SNVS902A October   2012  – October 2015 TPS92640 , TPS92641

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Controlled On-Time Architecture
      2. 7.3.2  Switching Frequency
      3. 7.3.3  Average LED Current
      4. 7.3.4  Analog Dimming and True-Zero Operation
      5. 7.3.5  Undervoltage Lockout (UVLO)
      6. 7.3.6  PWM Dimming Using the UDIM Pin
      7. 7.3.7  External Shunt FET PWM Dimming
      8. 7.3.8  VCC Regulation and Start-up
      9. 7.3.9  Precision Reference
      10. 7.3.10 Control Loop Compensation
      11. 7.3.11 Overcurrent Protection
      12. 7.3.12 Overvoltage Protection (OVP)
      13. 7.3.13 Boot Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Low Power Shutdown Using the UDIM Pin
      2. 7.4.2 Thermal Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Switching Frequency
      2. 8.1.2 LED Ripple Current
      3. 8.1.3 Buck Converters Without Output Capacitor
      4. 8.1.4 Input Capacitor
      5. 8.1.5 NFETs
    2. 8.2 Typical Applications
      1. 8.2.1 TPS92640: Design Procedure
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Set Output Voltage Feedback Ratio
          2. 8.2.1.2.2 Set Switching Frequency
          3. 8.2.1.2.3 Set Average LED Current
          4. 8.2.1.2.4 Set Inductor Ripple Current
          5. 8.2.1.2.5 Set LED Ripple Current and Determine Output Capacitance, COUT
          6. 8.2.1.2.6 Choose N-Channel MOSFETs
          7. 8.2.1.2.7 Choose Input Capacitance
          8. 8.2.1.2.8 Set the Turnon Voltage and Undervoltage Lockout Hysteresis
      2. 8.2.2 TPS92640 - PWM Dimming Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Calculate Operating Points
          2. 8.2.2.2.2 Output Voltage Feedback
          3. 8.2.2.2.3 Switching Frequency
          4. 8.2.2.2.4 Set the Feedback Reference and LED Current
          5. 8.2.2.2.5 Calculate the Inductor Value
          6. 8.2.2.2.6 Calculate the Output Capacitor Value
          7. 8.2.2.2.7 Calculate the MOSFET Parameters
          8. 8.2.2.2.8 Calculate the Minimum Input Capacitance
          9. 8.2.2.2.9 Undervoltage Lockout and Hysteresis
        3. 8.2.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 EMI and Noise Considerations
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

TPS92640 PWP Package
14-Pin HTSSOP
Top View
TPS92640 TPS92641 PWP-14_SNVS902.gif
TPS92641 PWP Package
16-Pin HTSSOP
Top View
TPS92640 TPS92641 PWP-16_SNVS902.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO. (TPS92640) NO. (TPS92641)
BOOT 12 14 O Connect 100-nF ceramic capacitor to switch node and diode to VCC to provide boosted voltage for high-side gate drive.
COMP 7 7 O Connect ceramic capacitor to GND to set loop compensation.
CS 9 11 I Connect to positive terminal of sense resistor at the bottom of the LED stack.
GND 8 10 — System GND. Connect to DAP.
HG 14 16 O Connect to gate of high-side NFET of buck regulator. Use series resistor to limit current slew-rate and mitigate EMI noise.
IADJ 6 6 I Connect resistor divider from VREF to set analog dimming level. Use NTC resistor from pin to GND as resistor divider to implement thermal foldback operation.
LG 10 12 O Connect to gate of low-side NFET of buck regulator. Use series resistor to limit current slew-rate and mitigate EMI noise.
RON 2 2 I Connect a resistor to VIN and capacitor to GND to set switching frequency.
SDIM — 8 I PWM dimming input for shunt FET dimming.
SDRV — 9 O Connect to gate of external parallel NFET across LED load used for shunt dimming if desired.
SW 13 15 O Connect to switch node of buck regulator.
UDIM 3 3 I Connect resistor divider from VIN to set undervoltage lockout threshold.
VCC 11 13 O Bypass with 2.2-µF ceramic capacitor to provide bias supply for controller.
VIN 1 1 I Connect to input voltage. Connect 1-µF bypass capacitor
VOUT 4 4 I Connect resistor divider from VOUT, scaled down feedback of VOUT.
VREF 5 5 O System reference voltage. Bypass with 100-nF ceramic capacitor.
DAP — — — Place 6-9 vias from pad to GND plane for thermal relief.