JAJSHS0C March 2019 – March 2021 TPS92682-Q1
PRODUCTION DATA
LHCFG is the Limp-Home Configuration register. The settings in this register are applied when LH pin is set high.
ADDR | REGISTER | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | DEFAULT |
---|---|---|---|---|---|---|---|---|---|---|
17h | LHCFG | LHPWMPH | LHINTPWM | LHCH2MAXDEN | LHCH1MAXDEN | LHCH2PDRVEN | LHCH1PDRVEN | LHCH2EN | LHCH1EN | 00111100 |
0: Phase shift of 180° between internal PWM signals
1: Zero phase shift between internal PWM signals
0: External PWM inputs are used.
1: Internal PWM inputs are used.
0: Maximum duty cycle for the associated channel is disabled.
1: Maximum duty cycle for the associated channel is enabled.
0: The associated channel PFET driver is disabled.
1: The associated channel PFET driver is enabled.
0: The associated channel is disabled.
1: The associated channel is enabled.
If 2PH is set to '1', only CH1 parameter is used.