JAJSKJ1A December   2020  – February 2021 TPS929121-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Device Bias and Power
        1. 8.3.1.1 Power Supply (SUPPLY)
        2. 8.3.1.2 5-V Low-Drop-Out Linear Regulator (VLDO)
        3. 8.3.1.3 Undervoltage Lockout (UVLO) and Power-On-Reset (POR)
        4. 8.3.1.4 Programmable Low Supply Warning
      2. 8.3.2 Constant Current Output
        1. 8.3.2.1 Reference Current With External Resistor (REF)
        2. 8.3.2.2 64-Step Programmable High-Side Constant-Current Output
      3. 8.3.3 PWM Dimming
        1. 8.3.3.1 PWM Dimming Frequency
        2. 8.3.3.2 PWM Generator
        3. 8.3.3.3 Linear Brightness Control
        4. 8.3.3.4 Exponential Brightness Control
        5. 8.3.3.5 External Clock Input for PWM Generator (CLK)
        6. 8.3.3.6 External PWM Input ( PWM0 and PWM1)
      4. 8.3.4 On-chip 8-bit Analog-to-Digital Converter (ADC)
      5. 8.3.5 Diagnostic and Protection in Normal State
        1. 8.3.5.1  Fault Masking
        2. 8.3.5.2  Supply Undervoltage Lockout Diagnostics in Normal State
        3. 8.3.5.3  Low-Supply Warning Diagnostics in Normal State
        4. 8.3.5.4  Reference Diagnostics in Normal State
        5. 8.3.5.5  Pre-Thermal Warning and Overtemperature Protection in Normal State
        6. 8.3.5.6  Communication Loss Diagnostic in Normal State
        7. 8.3.5.7  LED Open-Circuit Diagnostics in Normal State
        8. 8.3.5.8  LED Short-Circuit Diagnostics in Normal State
        9. 8.3.5.9  On-Demand Off-State Invisible Diagnostics
        10. 8.3.5.10 On-Demand Off-State Single-LED Short-Circuit (SS) Diagnostics
        11. 8.3.5.11 Automatic Single-LED Short-Circuit (AutoSS) Detection in Normal State
        12. 8.3.5.12 EEPROM CRC Error in Normal State
        13.       48
      6. 8.3.6 Diagnostic and Protection in Fail-Safe States
        1. 8.3.6.1 Fault Masking
        2. 8.3.6.2 Supply UVLO Diagnostics in Fail-Safe States
        3. 8.3.6.3 Low-supply Warning Diagnostics in Fail-Safe states
        4. 8.3.6.4 Reference Diagnostics at Fail-Safe States
        5. 8.3.6.5 Overtemperature Protection in Fail-Safe State
        6. 8.3.6.6 LED Open-circuit Diagnostics in Fail-Safe State
        7. 8.3.6.7 LED Short-circuit Diagnostics in Fail-Safe State
        8. 8.3.6.8 EEPROM CRC Error in Fail-safe State
        9.       58
    4. 8.4 Device Functional Modes
      1. 8.4.1 POR State
      2. 8.4.2 Initialization State
      3. 8.4.3 Normal State
      4. 8.4.4 Fail-Safe States
      5. 8.4.5 Program State
      6. 8.4.6 Programmable Output Failure State
      7. 8.4.7 ERR Output
      8. 8.4.8 Register Default Data
    5. 8.5 Programming
      1. 8.5.1 FlexWire Protocol
        1. 8.5.1.1 Protocol Overview
        2. 8.5.1.2 UART Interface Address Setting
        3. 8.5.1.3 Status Response
        4. 8.5.1.4 Synchronization Byte
        5. 8.5.1.5 Device Address Byte
        6. 8.5.1.6 Register Address Byte
        7. 8.5.1.7 Data Frame
        8.       77
        9. 8.5.1.8 CRC Frame
        10. 8.5.1.9 Burst Mode
      2. 8.5.2 Registers Lock
      3. 8.5.3 All Registers CRC Check
      4. 8.5.4 EEPROM Programming
        1. 8.5.4.1 Chip Selection by Pulling REF Pin High
        2. 8.5.4.2 Chip Selection by ADDR Pins configuration
        3. 8.5.4.3 EEPROM Register Access and Burn
        4. 8.5.4.4 EEPROM Program State Exit
        5. 8.5.4.5 Reading Back EEPROM
    6. 8.6 Register Maps
      1. 8.6.1 FullMap Registers
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Smart Rear Lamp With Distributed LED drivers
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 用語集
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.6.8 EEPROM CRC Error in Fail-safe State

The TPS929121-Q1 automatically reloads all EEPROM code into the corresponding configuration registers every time after entering the fail-safe state. The TPS929121-Q1 implements a EEPROM CRC check after loading the EEPROM code to configuration register in fail-safe state. The calculated CRC result are sent to register CALC_EEPCRC and compared to the data in EEPROM register EEP_CRC, which stores the CRC code for all EEPROM registers. If the code in register CALC_EEPCRC is not matched to the code in register EEP_CRC, the TPS929121-Q1 turns off all channels output, pulls the ERR pin down with constant current sink to report the fault, and sets the registers including FLAG_EEPCRC and FLAG_ERR to 1. The CRC code for all the EEPROM registers must be burnt into EEPROM register EEP_CRC in the end of production line. The CRC code algorithm is described in EEPROM CRC Error in Normal State.