When the TPS929121-Q1 is entering fail-safe states from normal state, all the registers are set to default value or reloaded from EEPROM. The TPS929121-Q1 provides two sets of channel enable configuration in fail-safe states, programmable by EEP_FS0CHx and EEP_FS1CHx. In fail-safe state 0, the channel-enable register CONF_ENCHx automatically loads code from EEP_FS0CHx; in fail-safe state 1, the channel-enable register CONF_ENCHx automatically loads code from EEP_FS1CHx. The fail-safe state is selective by FS pin voltage. The fail-safe state 1 is selected by pulling the FS pin to high, otherwise the fail-safe state 0 is selected. The flag register FLAG_EXTFS shows the FS input level at real-time. If FS pin input voltage is logic high, the FLAG_EXTFS is set to 1.The device does not reset diagnostics status or FLAG registers when switching between two fail-safe states.

Setting CONF_FORCEFS to 1 forces the device into fail-safe state from normal state. The TPS929121-Q1 can quit from fail-safe state to normal state by setting CLR_FS to 1 with FLAG registers cleared. The CONF_CLRLOCK register is automatically set to 1 when the TPS929121-Q1 goes into the fail-safe state to prevent the modification of configuration register by mistake. To get out of fail-safe states to normal state, CONF_CLRLOCK register must be cleared to 0 before setting CLR_FS to 1.

The fail-safe states also allows the TPS929121-Q1 operating as standalone device without master controlling in the system. The ERR pin is used as fault indicator to achieve one-fails-all-fail or one-fails-others-on diagnostics requirement. When low quiescent current in fault mode is required, all channels must be set as one-fails-all-fail. In this case, if fault is triggered, the device goes into low current fault mode and disables FlexWire interface to save quiescent current.