JAJSOC6A march   2023  – april 2023 TPSF12C1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 System Characteristics
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Active EMI Filtering
        1. 8.3.1.1 Schematics
      2. 8.3.2 Capacitive Amplification
      3. 8.3.3 Integrated Line Rejection Filter
      4. 8.3.4 Compensation
      5. 8.3.5 Remote Enable
      6. 8.3.6 Supply Voltage UVLO Protection
      7. 8.3.7 Thermal Shutdown Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Active Mode
  10. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design 1 – AEF Circuit for a High-Density 3-kW Server Rack Power Supply
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Sense Capacitors
          2. 9.2.1.2.2 Inject Capacitor
          3. 9.2.1.2.3 Compensation Network
          4. 9.2.1.2.4 Injection Network
          5. 9.2.1.2.5 Surge Protection
        3. 9.2.1.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
      2. 10.1.2 Development Support
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

GUID-20221106-SS0I-WN5B-M0SG-C0HSCKHFS5FX-low.svg Figure 6-1 14-Pin SOT-23-THIN DYY Package(Top View)
Table 6-1 Pin Functions
PINTYPE(1)DESCRIPTION
NO.NAME
1, 3, 12NC–No internal connection. Tie to the GND plane on the PCB.
2VDDPPower supply for IC. Bypass to IGND with a 1-µF X7R ceramic capacitor.
4SENSE1AISense input (power line or neutral)
5 SENSE1B I Sense input (power line or neutral)
6SENSE2AISense input (power line or neutral)
7 SENSE2B I Sense input (power line or neutral)
8ENIEnable signal to activate noise cancellation
9REFGNDGReference ground (Kelvin connected to IGND)
10COMP1IConnection 1 for external compensation circuit
11COMP2IConnection 2 for external compensation circuit
13INJOInjection signal output
14IGNDGInjection ground
(1) P = Power, G = Ground, I = Input, O = Output