JAJSN97D November 2021 – August 2023 TPSI3050-Q1
PRODUCTION DATA
Table 9-1 lists the design requirements of the TPSI3050-Q1 gate driver.
DESIGN PARAMETERS | |
---|---|
Total gate capacitance | 100 nC |
FET turn-on time | 1 µs |
Propagation delay | < 4 µs |
Switching frequency | 10 kHz |
Supply voltage (VDDP) | 5 V ± 5% |