TPSI3050-Q1 and TPSI3050S-Q1 implement an internal UVLO protection feature for both input and output power supplies, VDDP, VDDH, and VDDM. When VDDP is lower than the UVLO threshold voltage, power ceases to be transferred to the VDDM and VDDH rails. Over time the VDDH and VDDM rails will begin to discharge. If enough charge is available on VDDP, the device will attempt to signal VDRV to assert low. If not enough charge is available on VDDP, a timeout mechanism will ensure VDRV asserts low after the timeout has been reached. When either VDDH or VDDM are lower than their respective UVLO thresholds, VDRV will be asserted low regardless of the EN state. The UVLO protection blocks feature hysteresis, which helps to improve the noise immunity of the power supply. During turn-on and turn-off, the driver sources and sinks a peak transient current, which can result in voltage drop of the VDDH, VDDM power supplies. The internal UVLO protection block ignores the associated noise during these normal switching transients.