JAJSN97D November   2021  – August 2023 TPSI3050-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Insulation Characteristic Curves
    12. 6.12 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Transmission of the Enable State
      2. 8.3.2 Power Transmission
      3. 8.3.3 Gate Driver
      4. 8.3.4 Modes Overview
      5. 8.3.5 Three-Wire Mode
      6. 8.3.6 Two-Wire Mode
      7. 8.3.7 VDDP, VDDH, and VDDM Undervoltage Lockout (UVLO)
      8. 8.3.8 Power Supply and EN Sequencing
      9. 8.3.9 Thermal Shutdown
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Two-Wire or Three-Wire Mode Selection
        2. 9.2.2.2 Standard Enable, One-Shot Enable
        3. 9.2.2.3 CDIV1, CDIV2 Capacitance
        4. 9.2.2.4 RPXFR Selection
        5. 9.2.2.5 CVDDP Capacitance
        6. 9.2.2.6 Gate Driver Output Resistor
        7. 9.2.2.7 Start-up Time and Recovery Time
        8. 9.2.2.8 Supplying Auxiliary Current, IAUX From VDDM
        9. 9.2.2.9 VDDM Ripple Voltage
      3. 9.2.3 Application Curves
      4. 9.2.4 Insulation Lifetime
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Related Links
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.2.2.4 RPXFR Selection

The selection of RPXFR allows for a tradeoff between power consumed and power delivered, as described in the Three-wire Mode section. For this design, one must choose an appropriate RPXFR selection that ensures enough power is transferred to support the amount of load being driven at the specified switching frequency.

During switching of the load, QLOAD of charge on VDDH is transferred to the load and VDDH supply voltage droops. After each switching cycle, this charge must be replenished before the next switching cycle occurs. This action ensures that the charge residing on VDDH does not deplete over time due to subsequent switching cycles of the load. The time it takes to recover this charge, tRECOVER, can be estimated as follows:

Equation 5. t R E C O V E R =   1 f M A X ≅   Q L O A D I O U T

where

  • QLOAD is the load charge in Coulombs.
  • IOUT is the average current available from VDDH supply in Amperes (A).
  • fMAX is maximum switching frequency in Hertz (Hz).

For this design, QLOAD = 100 nC and fMAX = 10 kHz are known, so IOUT required can be estimated as

Equation 6. I O U T ≅   100   n C × 10   k H z = 1.0   m A  

IOUT represents the minimum average current required to meet the design requirements. Using the TPSI3050-Q1 calculator tool, one can easily find the RPXFR necessary by referring to the IOUT or fMAX columns directly. Table 9-2 shows the results from the tool, assuming VDDP = 4.75 V, to account for the supply tolerance specified in the design requirements. The TPSI3050-Q1 Calculator tool can be found at Design Calculator.

Table 9-2 Results from the TPSI3050-Q1 Calculator Tool, TA = 25°C, Three-Wire Mode
RPXFR, kΩ Power Converter Duty Cycle, % IVDDP, mA PIN, mW POUT, mW IOUT, mA tSTART, µs tRECOVER, µs fEN_MAX, kHz IAUX_MAX, mA
9.09 21.1 6.82 32.0 10.8 1.05 1944.3 93.13 10.74 0.15
11 40.0 14.09 66.6 23.7 2.32 976.0 42.68 23.43 2.66
12.7 53.3 19.22 90.9 32.5 3.19 754.1 31.11 32.14 4.38
14.7 66.7 24.38 115.4 41.3 4.07 626.1 24.44 40.91 6.12
16.5 80.0 29.50 139.8 50.7 4.99 539.5 19.93 50.17 7.96
20 93.3 34.62 164.1 59.6 5.87 482.4 16.96 58.98 9.70

Table 9-3 summarizes the various output parameters of the calculator tool.

Table 9-3 TPSI3050-Q1 Calculator Tool Parameter Descriptions
Parameter Description
RPXFR External resistor setting that controls the amount of power transferred to the load by adjusting the duty cycle. Higher RPXFR settings lead to increased power transfer and power consumption.
Power Converter Duty Cycle Nominal duty cycle of the power converter. Higher RPXFR settings leads to higher duty cycles of the power converter and higher power transfer.
IVDDP Average current consumed from the VDDP supply
PIN Average power consumed from the VDDP supply
POUT Average power delivered to the VDDH supply
IOUT Average current delivered to the VDDH supply
tSTART Start-up time from VDDP rising until VDDH supply rail is fully charged. This parameter assumes VDDH and VDDM supply rails are fully discharged initially.
tRECOVER Represents the time for the VDDH rail to recover after switching the load present on VDRV
fMAX Maximum switching frequency possible for a given RPXFR setting for the applied loading conditions
IAUX_MAX Maximum auxiliary current available at current user input settings. There is an inverse relationship between fMAX and IAUX_MAX.

For this design example, RPXFR must be configured to the 9.09-kΩ setting or higher to transfer enough power to support switching the specified load at the required 10-kHz frequency.