JAJSI64C November   2019  – September 2021 TPSM53604

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics (VIN = 5 V)
    7. 6.7 Typical Characteristics (VIN = 12 V)
    8. 6.8 Typical Characteristics (VIN = 24 V)
    9. 6.9 Typical Characteristics (VIN = 36 V)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Switching Frequency
      3. 7.3.3  Input Capacitors
      4. 7.3.4  Output Capacitors
      5. 7.3.5  Output On/Off Enable (EN)
      6. 7.3.6  Programmable Undervoltage Lockout (UVLO)
      7. 7.3.7  Power Good (PGOOD)
      8. 7.3.8  Light Load Operation
      9. 7.3.9  Voltage Dropout
      10. 7.3.10 Overcurrent Protection (OCP)
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Auto Mode
      3. 7.4.3 Shutdown Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Input Capacitors
        4. 8.2.2.4 Output Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Theta JA versus PCB Area
    4. 10.4 Package Specifications
    5. 10.5 EMI
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.9 Voltage Dropout

Voltage dropout is the difference between the input voltage and output voltage that is required to maintain output voltage regulation while providing the rated output current.

To ensure the TPSM53604 maintains output voltage regulation over the operating temperature range, the minimum VIN is 3.8 V or (VOUT + 1 V), whichever is greater.

The TPSM53604 operates in a frequency foldback mode when the dropout voltage is less than the recommendation above. Frequency foldback reduces the switching frequency to allow the output voltage to maintain regulation as input voltage decreases. At light load, the TPSM53604 operates in PFM mode which is a reduced frequency operation, see Section 7.4.2 for more information on PFM mode. Figure 7-7 through Figure 7-12 show typical dropout voltage and frequency foldback curves for 3.3 V, 5 V, and 7 V outputs at TA = 25°C.

Note:

As ambient temperature increases, dropout voltage and frequency foldback occur at higher input voltage.

GUID-404FF46B-8347-4F8C-9B71-B3D262CDA3E3-low.gif
VOUT = 3.3 V
Figure 7-7 Voltage Dropout
GUID-30757A94-9A6D-4D1D-B716-8EDF4C9C02A1-low.gif
VOUT = 5 V
Figure 7-9 Voltage Dropout
GUID-9A051CCF-3A34-4947-9610-812F906AE3DC-low.gif
VOUT = 7 V
Figure 7-11 Voltage Dropout
GUID-5258825D-C290-4971-A458-B015DBA84F90-low.gif
VOUT = 3.3 V
Figure 7-8 Frequency Foldback
GUID-95AA0B1E-5420-4879-B518-62F484709632-low.gif
VOUT = 5 V
Figure 7-10 Frequency Foldback
GUID-592B72D7-4A49-4F7E-B565-23B079A1AE70-low.gif
VOUT = 7 V
Figure 7-12 Frequency Foldback