For a DC/DC module to be useful over a particular temperature range, the package must allow for the efficient removal of the heat produced while keeping the junction temperature within rated limits. The TPSM63606E module is available in a small 5.5-mm × 5-mm 20-pin QFN (RDL) package to cover a range of application requirements. The Thermal Information table summarizes the thermal metrics of this package with related detail provided by the Semiconductor and IC Package Thermal Metrics Application Report.

The 20-pin QFN package offers a means of removing heat through the exposed thermal pads at the base of the package. This allows a significant improvement in heatsinking, and it becomes imperative that the PCB is designed with thermal lands, thermal vias, and one or more ground planes to complete the heat removal subsystem. The exposed pads of the TPSM63606E are soldered to the ground-connected copper lands on the PCB directly underneath the device package, reducing the thermal resistance to a very low value.

Preferably, use a four-layer board with 2-oz copper thickness for all layers to provide low impedance, proper shielding and lower thermal resistance. Numerous vias with a 0.3-mm diameter connected from the thermal lands to the internal and solder-side ground planes are vital to promote heat transfer. In a multi-layer PCB stack-up, a solid ground plane is typically placed on the PCB layer below the power-stage components. Not only does this provide a plane for the power-stage currents to flow, but it also represents a thermally conductive path away from the heat-generating device.