VCC is the output of the internal LDO subregulator used to supply the control circuits of the TPSM63606E. The nominal VCC voltage is 3.3 V. The VLDOIN pin is the input to the internal LDO. Connect this input to V_OUT to provide the lowest possible input supply current. If the VLDOIN voltage is less than 3.1 V, VIN1 and VIN2 directly power the internal LDO.

To prevent unsafe operation, VCC has UVLO protection that prevents switching if the internal voltage is too low. See V_{CC_UVLO} and V_{CC_UVLO_HYS} in the Electrical Characteristics.

VCC must not be used to power external circuitry. Do not load VCC or short it to ground. VLDOIN is an optional input to the internal LDO. Connect an optional high quality 0.1-µF to 1-µF capacitor from VLDOIN to AGND for improved noise immunity.

The LDO provides the VCC voltage from one of two inputs: V_IN or VLDOIN. When VLDOIN is tied to ground or below 3.1 V, the LDO derives power from V_IN. The LDO input becomes VLDOIN when VLDOIN is tied to a voltage above 3.1 V. The VLDOIN voltage must not exceed both V_IN and 12 V.

Equation 8 specifies the LDO power loss reduction as:

The VLDOIN input provides an option to supply the LDO with a lower voltage than V_IN, thus minimizing the LDO input voltage relative to VCC and reducing power loss. For example, if the LDO current is 10 mA at 1 MHz with V_IN = 24 V and V_OUT = 5 V, the LDO power loss with VLDOIN tied to ground is 10 mA × (24 V – 3.3 V) = 207 mW, while the loss with VLDOIN tied to V_OUT is equal to 10 mA × (5 V – 3.3 V) = 17 mW – a reduction of 190 mW.

Figure 8-5 and Figure 8-6 show typical efficiency plots with and without VLDOIN connected to VOUT.