JAJSPL2
October 2024
TPSM82916
ADVANCE INFORMATION
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Smart Config (S-CONF)
6.3.2
Device Enable (EN/SYNC)
6.3.3
Device Synchronization (EN/SYNC)
6.3.4
Spread Spectrum Modulation
6.3.5
Output Discharge
6.3.6
Undervoltage Lockout (UVLO)
6.3.7
Power-Good Output
6.3.8
Noise Reduction and Soft-Start Capacitor (NR/SS)
6.3.9
Current Limit and Short-Circuit Protection
6.3.10
Thermal Shutdown
6.4
Device Functional Modes
6.4.1
Fixed Frequency Pulse Width Modulation
6.4.2
Low Duty Cycle Operation
6.4.3
High Duty Cycle Operation (100% Duty Cycle)
6.4.4
Second Stage L-C Filter Compensation (Optional)
7
Application and Implementation
7.1
Application Information
7.2
Typical Applications
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Custom Design With WEBENCH® Tools
7.2.2.2
External Component Selection
7.2.2.2.1
Switching Frequency Selection
7.2.2.2.2
Output Capacitor Selection
7.2.2.2.3
Ferrite Bead Selection for Second L-C Filter
7.2.2.2.4
Input Capacitor Selection
7.2.2.2.5
Setting the Output Voltage
7.2.2.2.6
NR/SS Capacitor Selection
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Device Support
8.1.1
サード・パーティ製品に関する免責事項
8.1.2
Development Support
8.1.2.1
Custom Design With WEBENCH® Tools
8.2
Documentation Support
8.2.1
Related Documentation
8.3
ドキュメントの更新通知を受け取る方法
8.4
サポート・リソース
8.5
Trademarks
8.6
静電気放電に関する注意事項
8.7
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
VCE|16
サーマルパッド・メカニカル・データ
発注情報
jajspl2_oa
7.4
Layout