JAJSP72 August   2024 TPSM83102

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Rating
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics 
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Enable and Soft Start
      3. 7.3.3 Adjustable Output Voltage
      4. 7.3.4 Reverse Current Operation
      5. 7.3.5 Protection Features
        1. 7.3.5.1 Input Overvoltage Protection
        2. 7.3.5.2 Short Circuit Protection
        3. 7.3.5.3 Thermal Shutdown
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 Standard-, Fast-, and Fast-Mode Plus Protocol
      3. 7.5.3 I2C Update Sequence
    6. 7.6 Register Map
      1. 7.6.1 Register Description
        1. 7.6.1.1 Register Map
        2. 7.6.1.2 Register CONTROL1 (Register address: 0x02; Default: 0x08)
        3. 7.6.1.3 Register VOUT (Register address: 0x03; Default: 0x5C)
        4. 7.6.1.4 Register CONTROL2 (Register address: 0x05; Default: 0x45)
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design with WEBENCH Tools
        2. 8.2.2.2 Output Capacitor Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Setting the Output Voltage
      3. 8.2.3 Application Curves
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design with WEBENCH Tools
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information
    2. 12.2 Mechanical Data

パッケージ・オプション

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発注情報

7.3.5.1 Input Overvoltage Protection

The TPSM83102 and TPSM83103 have input overvoltage protection which avoids any damage to the device in case the current flows from the output to the input and the input source cannot sink current (for example, a diode in the supply path).

If forced PWM mode is active, the current can go negative until it reaches the sink current limit. Once the input voltage threshold, VT+(IVP), is reached on the VIN pin, the protection disables forced PWM mode and only allows current to flow from VIN to VOUT. After the input voltage drops under the input voltage protection threshold, forced PWM mode can be activated again.