JAJSEQ4A February   2018  – April 2018 TPSM84424

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      過渡応答
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics (VIN = 12 V)
    8. 6.8 Typical Characteristics (VIN = 5 V)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Switching Frequency (RT)
      3. 7.3.3  Synchronization (CLK)
      4. 7.3.4  Output On/Off Enable (EN)
      5. 7.3.5  Input Capacitor Selection
      6. 7.3.6  Output Capacitor Selection
      7. 7.3.7  TurboTrans (TT)
        1. 7.3.7.1 Low-ESR Output Capacitors
        2. 7.3.7.2 Transient Response
          1. 7.3.7.2.1 Transient Waveforms (VIN = 12 V)
      8. 7.3.8  Undervoltage Lockout (UVLO)
      9. 7.3.9  Soft Start (SS/TR)
      10. 7.3.10 Sequencing (SS/TR)
      11. 7.3.11 Power Good (PGOOD)
      12. 7.3.12 Safe Start-up into Pre-Biased Outputs
      13. 7.3.13 Overcurrent Protection
      14. 7.3.14 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Shutdown Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Setting the Switching Frequency
        4. 8.2.2.4 Input Capacitors
        5. 8.2.2.5 Output Capacitors
        6. 8.2.2.6 TurboTrans Resistor
        7. 8.2.2.7 Application Waveforms
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 EMI
      1. 10.3.1 EMI Plots
    4. 10.4 Package Specifications
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 11.2 開発サポート
      1. 11.2.1 WEBENCH®ツールによるカスタム設計
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報
    1. 12.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.5 Input Capacitor Selection

The TPSM84424 requires a minimum input capacitance of 20 µF of ceramic type. Use only high-quality ceramic type X5R or X7R capacitors with sufficient voltage rating. TI recommends an additional 100 µF of non-ceramic capacitancefor applications with transient load requirements. The voltage rating of input capacitors must be greater than the maximum input voltage. To compensate the derating of ceramic capactors, a voltage rating of twice the maximum input voltage is recommended. At worst case, when operating at 50% duty cycle and maximum load, the combined ripple current rating of the input capacitors must be at least 2 A(rms). Table 3 includes a preferred list of capacitors by vendor.

Table 3. Recommended Input Capacitors(1)

VENDOR SERIES PART NUMBER CAPACITOR CHARACTERISTICS
WORKING VOLTAGE (V) CAPACITANCE (3)
(µF)		 ESR (2)
(mΩ)
TDK X7R C3225X7R1E106K250AC 25 10 2
Murata X7R GRM32DR71E106KA12L 25 10 2
Panasonic ZA EEHZA1H101P 50 100 28
Panasonic FC EEUFC1H101B 50 100 162
(1) Capacitor Supplier Verification, RoHS, Lead-free and Material Details
Consult capacitor suppliers regarding availability, material composition, RoHS and lead-free status, and manufacturing process requirements for any capacitors identified in this table.
(2) Maximum ESR @ 100 kHz, 25°C.
(3) Specified capacitance values.