JAJSD45B December   2016  – July 2017 TPSM84A22

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Package Specifications
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage (VADJ)
      2. 7.3.2  Input and Output Capacitance
      3. 7.3.3  Transient Response
        1. 7.3.3.1 Transient Response Waveforms
      4. 7.3.4  Oscillator Frequency
      5. 7.3.5  External Clock Syncronization
      6. 7.3.6  Soft Start
      7. 7.3.7  Power Good (PGOOD)
      8. 7.3.8  Gate Driver (VG)
      9. 7.3.9  Startup into Pre-biased Outputs
      10. 7.3.10 Thermal Shutdown
      11. 7.3.11 Overcurrent Protection
      12. 7.3.12 Output Undervoltage/Overvoltage Protection
      13. 7.3.13 Enable (EN)
      14. 7.3.14 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Light Load Operation
      3. 7.4.3 Shutdown Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting the Output Voltage
        2. 8.2.2.2 Input and Output Capacitance
        3. 8.2.2.3 Power Good (PGOOD)
        4. 8.2.2.4 External VG Voltage
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 EMI
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Specifications

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Input voltage VIN –0.3 15 V
EN/UVLO –0.3 7 V
PGOOD, SYNC, VG –0.3 6 V
ILIM, VADJ, VS+ –0.3 3 V
PGND –0.3 0.3 V
Output voltage VOUT –0.3 3 V
Source current EN/UVLO 100 µA
Sink current VG 100 mA
PGOOD 4 mA
Mechanical shock Mil-STD-883D, Method 2002.3, 1 msec, 1/2 sine, mounted 500 G
Mechanical vibration Mil-STD-883D, Method 2007.2, 20-2000Hz 20 G
Operating IC junction temperature, TJ (2) –40 125 °C
Operating ambient temperature, TA (2) –40 85 °C
Storage temperature, Tstg –55 150 °C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The ambient temperature is the air temperature of the surrounding environment. The junction temperature is the temperature of the internal power IC when the device is powered. Operating below the maximum ambient temperature, as shown in the safe operating area (SOA) curves, ensures that the maximum junction temperature of any component inside the module is never exceeded.

ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIN Input voltage 8 14 V
VOUT Output voltage 1.2 2.05 V
VVG Gate drive voltage 5.0 5.5 V
VEN EN voltage 0 5.5 V
VPGOOD PGOOD pull-up voltage 0 5.5 V
VSYNC SYNC voltage 0 5.5 V
IOUT Output current 0 10 A
TJ Operating IC junction temperature (1) –40 125 °C
TA Operating ambient temperature (1) –40 85 °C
The ambient temperature is the air temperature of the surrounding environment. The junction temperature is the temperature of the internal power IC when the device is powered. Operating below the maximum ambient temperature, as shown in the safe operating area (SOA) curves, ensures that the maximum junction temperature of any component inside the module is never exceeded.

Thermal Information

THERMAL METRIC(1) TPSM84A22 UNIT
MOJ (QFM)
20 PINS
RθJA Junction-to-ambient thermal resistance (2) 14.9 °C/W
ψJT Junction-to-top characterization parameter (3) 2.2 °C/W
ψJB Junction-to-board characterization parameter (4) 5.7 °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
The junction-to-ambient thermal resistance, ΘJA, applies to devices soldered directly to a 50 mm x 100 mm double-sided PCB with 2 oz. copper and natural convection cooling. Additional airflow reduces ΘJA.
The junction-to-top board characterization parameter, ΘJT, estimates the junction temperature, TJ, of a device in a real system, using a procedure described in JESD51-2A (section 6 and 7). TJ = ψJT * Pdis + TT; where Pdis is the power dissipated in the device and TT is the temperature of the top of the device.
The junction-to-board characterization parameter, ψJB, estimates the junction temperature, TJ, of a device in a real system, using a procedure described in JESD51-2A (sections 6 and 7). TJ = ψJB * Pdis + TB; where Pdis is the power dissipated in the device and TB is the temperature of the board 1mm from the device.

Electrical Characteristics

Over –40ºC to +85°C free-air temperature range, VIN = 12 V, VOUT = 1.5 V, IOUT = IOUT max, FSW = 4 MHz,
External CIN = 2 × 22 µF 25 V 1210 ceramic plus 1 × 100 µF electrolytic (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT VOLTAGE (VIN)
VIN VIN input voltage range Over VOUT range 8(2) 14 V
VIN_UVLO VIN under voltage lock out VIN increasing 7.65 7.95 V
VIN decreasing 7.4 V
VIN_HYS VIN UVLO hysteresis 250 mV
IVIN_EN VIN standby current EN = 0 V 47 µA
OUTPUT VOLTAGE (VOUT)
VOUT(ADJ) Output voltage adjust range Over IOUT range 1.2 2.05 V
VOUT Set-point voltage tolerance VOUT = 1.5 V, TA = 25°C, IOUT = 0 A -1.0% +1.0%(1)
Temperature variation VOUT = 1.5 V, –40°C ≤ TA ≤ 85°C, IOUT = 0 A ±0.2%(3)
Line regulation VOUT = 1.5 V, over VIN range, IOUT = 0 A, TA = 25°C ±0.03%
Load regulation VOUT = 1.5 V, over IOUT range, TA = 25°C ±0.1%
VOUT Ripple Output voltage ripple 20 MHz bandwidth, peak-to-peak 9 mV
OUTPUT CURRENT
IOUT Output current See SOA graph for derating over temperature. 0 10 A
Overcurrent threshold ILIM = open 15 A
ILIM = 47 kΩ 11.25 A
PERFORMANCE
ƞ Efficiency(3) VIN = 12 V, IOUT = 5 A VOUT = 1.2 V, VG = open 84.2%
VOUT = 1.2 V, VG = 5 V 86.2%
VOUT = 1.5 V, VG = open 85.7%
VOUT = 1.5 V, VG = 5 V 87.5%
VOUT = 1.8 V, VG = open 87.4%
VOUT = 1.8 V, VG = 5 V 89.0%
Transient response(3) 1 A/µs load step,
25% to 75% IOUT(max), COUT= 0 µF
VOUT over/undershoot 15 mV
Recovery time 10 µs
5 A/µs load step,
25% to 75% IOUT(max), COUT= 0 µF
VOUT over/undershoot 30 mV
Recovery time 10 µs
SOFT START
TSS Internal soft start time(3) 4.1 ms
INTERNAL REGULATOR (VG)
VVG VG pin output voltage 4.4 4.8 5.0 V
ENABLE AND UNDER-VOLTAGE LOCK-OUT (EN/UVLO)
VEN EN threshold range 1.17 1.23 1.27 V
IEN Input current EN threshold + 50 mV –4 µA
Hysteresis current EN threshold – 50 mV –1 µA
POWER GOOD (PGOOD)
VPGOOD PGOOD thresholds(3) VVOUT falling (Fault) 89%
VVOUT rising (Good) 95%
VVOUT rising (Fault) 109%
VVOUT falling (Good) 104%
Minimum VIN for valid PGOOD(3) VPGOOD ≤ 0.5 V at 100 µA 1.2 2.75 V
PGOOD low voltage IPGOOD = 1.7 mA 0.25 0.3 V
THERMAL SHUTDOWN
Thermal shutdown threshold 135 °C
Thermal shutdown hysteresis 20 °C
CAPACITANCE
CIN External input capacitance Ceramic type 0 (4) 44 µF
Non-ceramic type 0 (4) 100 µF
COUT External output capacitance Ceramic type 0 (5) 1000(6) µF
Non-ceramic type 0 (5) 2200(6) µF
Equivalent series resistance (ESR) 35
The stated limit of the set-point tolerance includes the tolerance of both the internal voltage reference and the internal adjustment resistor. The overall output voltage tolerance will be affected by the tolerance of the external RSET resistor.
The minimum VIN is 8V or (VOUT x 5.3), whichever is greater.
Specified by design. Not production tested.
Internal to the device, 14.2 µF (nominal) ceramic input capacitance is present. This device does not require additional input capacitance. If adding additional input capacitance, locate the capacitors close to the device.
Internal to the device, 135 µF (nominal) ceramic output capacitance is present. This device does not require additional output capacitance to operate. Adding additional output capacitance near the load improves the response of the device to load transients.
The maximum output capacitance listed in the table is the maximum amount that has been tested and validated for proper start-up, stability, and transient response. It may be possible to operate with additional output capacitance, however, additional validation is required.

Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
FREQUENCY AND SYNCHRONIZATION (SYNC) (1)
FSW Switching frequency SYNC = open 3.7 4 4.3 MHz
FSYNC Synchronization frequency range SYNC control 3.6 4.4 MHz
VSYNC-H SYNC high threshold 2.0 V
VSYNC-L SYNC low threshold 0.8 V
DSYNC SYNC duty cycle 20% 80%
Specified by design. Not production tested.

Package Specifications

TPSM84A22 VALUE UNIT
Weight 0.91 grams
Flammability Meets UL 94 V-O
MTBF Calculated Reliability Per Bellcore TR-332, 50% stress, TA = 40°C, ground benign 30.6 MHrs

Typical Characteristics

The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the converter. Applies to Figure 1, Figure 2, Figure 3, Figure 4 and Figure 11.

The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to devices soldered directly to a 50 mm × 100 mm double-sided PCB with 2 oz. copper. Applies to Figure 5 and Figure 6.

TPSM84A22 Eff12VZoom.gif
VIN = 12V VG = open
Figure 1. Efficiency
TPSM84A22 Pdiss12V.gif
VIN = 12V VG = open
Figure 3. Power Dissipation
TPSM84A22 SOA12V1_2VB.gif
VIN = 12V VOUT = 1.2V
Figure 5. Safe Operating Area
TPSM84A22 startup.gif
VIN = 12V VOUT = 1.8V IOUT = 1A
Figure 7. VIN Start-up Waveforms
TPSM84A22 ENon.gif
VIN = 12V VOUT = 1.8V IOUT = 1A
Figure 9. EN Start-up Waveforms
TPSM84A22 D001_SLVSDF8.gif Figure 11. Minimum Input Voltage
TPSM84A22 EffVGZoom.gif
VIN = 12V VG = 5V
Figure 2. Efficiency
TPSM84A22 Ripple12V.gif
VIN = 12V
Figure 4. Output Voltage Ripple
TPSM84A22 SOA12V1_8V.gif
VIN = 12V VOUT = 1.8V
Figure 6. Safe Operating Area
TPSM84A22 shutdown3.gif
VIN = 12V VOUT = 1.8V IOUT = 1A
Figure 8. VIN Shut-down Waveforms
TPSM84A22 ENoff2.gif
VIN = 12V VOUT = 1.8V IOUT = 1A
Figure 10. EN Shut-down Waveforms