JAJSPC1C March   2023  – January 2024 TPSM863252 , TPSM863253 , TPSM863257

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Family Devices
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Operation and D-CAP3™ Control Mode
      2. 7.3.2 Eco-mode Control
      3. 7.3.3 Soft Start and Prebiased Soft Start
      4. 7.3.4 Overvoltage Protection
      5. 7.3.5 Frequency
      6. 7.3.6 Large Duty Operation
      7. 7.3.7 Current Protection and Undervoltage Protection
      8. 7.3.8 Undervoltage Lockout (UVLO) Protection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Eco-mode Operation
      2. 7.4.2 FCCM Mode Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design with WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Resistors Selection
        3. 8.2.2.3 Output Filter Selection
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Enable Circuit
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Custom Design with WEBENCH® Tools
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2.2 Output Voltage Resistors Selection

The output voltage is set with a resistor divider from the output node to the FB pin. TI recommends using 1% tolerance or better divider resistors. Start by using Equation 2 to calculate VOUT.

To improve efficiency at very light loads, consider using larger value resistors. If the values are too high, the regulator is more susceptible to noise and voltage errors from the FB input current are noticeable. Use a 10kΩ resistor for R6 to start the design.

Equation 2. V OUT = 0 . 6 × 1 + R 5 R 6