JAJSLH7A December 2021 – November 2023 TPSM8D6C24
PRODUCTION DATA
| CMD Address | 25h |
| Write Transaction: | Write Word |
| Read Transaction: | Read Word |
| Format: | ULINEAR16, per VOUT_MODE |
| Phased: | No |
| NVM Backup: | EEPROM |
| Updates: | On-the-fly |
The VOUT_MARGIN_HIGH command loads the unit with the voltage to which the output is to be changed when the OPERATION command is set to “Margin High.” Output voltage transitions during margin operation occur at the slew rate defined by VOUT_TRANSITION_RATE.
When the MARGIN bits in the OPERATION command indicate “Margin High,” the output voltage is updated to the value of VOUT_MARGIN_HIGH + VOUT_TRIM.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RW | RW | RW | RW | RW | RW | RW | RW |
| VOUT_MARGH (High Byte) | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RW | RW | RW | RW | RW | RW | RW | RW |
| VOUT_MARGH (Low Byte) | |||||||
| LEGEND: R/W = Read/Write; R = Read only |
| Bit | Field | Access | Reset | Description |
|---|---|---|---|---|
| 15:0 | VOUT_ MARGH | RW | NVM | Margin High output voltage. ULINEAR16 relative or absolute per the setting of VOUT_ MODE |
The minimum and maximum valid data values for VOUT_MARGIN_HIGH follow the description in VOUT_COMMAND. That is, the total combined output voltage, including VOUT_MARGIN_HIGH and VOUT_TRIM, follow the values allowed by the current VOUT_MAX setting.
Attempts to write (25h) VOUT_MARGIN_HIGH to any value outside those specified as valid are considered invalid or unsupported data and cause the TPSM8D6C24 to respond by flagging the appropriate status bits and notifying the host according to the PMBus 1.3.1 Part II specification section 10.9.3.