JAJSLH7 データシート

JAJSLH7A December 2021 – November 2023 TPSM8D6C24

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

MOW|59

サーマルパッド・メカニカル・データ

発注情報

6.6.26 (2Bh) VOUT_MIN

CMD Address	2Bh
Write Transaction:	Write Word
Read Transaction:	Read Word
Format:	ULINEAR16, absolute Only per VOUT_MODE
Phased:	No
Updates:	On-the-fly
NVM Backup:	EEPROM or Pin Detection

The VOUT_MIN command sets a lower limit on the output voltage the unit can command regardless of any other commands or combinations. The intent of this command is to provide a safeguard against a user accidentally setting the output voltage to a level that renders the load inoperable.

Figure 6-32 (2Bh) VOUT_MIN Register Map

15	14	13	12	11	10	9	8
RW	RW	RW	RW	RW	RW	RW	RW
VOUT_MIN (High Byte)

7	6	5	4	3	2	1	0
RW	RW	RW	RW	RW	RW	RW	RW
VOUT_MIN (Low Byte)

LEGEND: R/W = Read/Write; R = Read only

Table 6-41 Register Field Descriptions

Bit	Field	Access	Reset	Description
15:0	VOUT_ MIN	RW	NVM	Minimum output voltage. ULINEAR16 absolute per the setting of VOUT_ MODE.

During power conversion, any output voltage change (including VOUT_COMMAND, VOUT_TRIM, and margin operations) that causes the new target voltage to be less than the current value of VOUT_MIN causes the VOUT_MAX_MIN_WARNING fault condition. These results cause the TPSM8D6C24 to:

Set to the output voltage to current value of VOUT_MIN at the slew rate defined by VOUT_TRANSITION_RATE.
Set the NONE OF THE ABOVE in the STATUS_BYTE.
Set the VOUT bit in the STATUS_WORD.
Set the VOUT_MIN_MAX warning bit in STATUS_VOUT.
Notify the host per PMBus 1.3.1 Part II specification, section 10.2.

Although the scenario is uncommon, note that the same response results if the user attempted to program VOUT_MAX greater than the current output voltage target.

Data Validity

The minimum and maximum valid data values for VOUT_MIN follow those of VOUT_MAX. Attempts to write (2Bh) VOUT_MIN to any value outside those specified as valid are considered invalid or unsupported data and cause the TPSM8D6C24 to respond by flagging the appropriate status bits and notifying the host according to the PMBus 1.3.1 Part II specification section 10.9.3.