JAJSLH7 データシート

JAJSLH7A December 2021 – November 2023 TPSM8D6C24

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6.6.33 (40h) VOUT_OV_FAULT_LIMIT

CMD Address	40h
Write Transaction:	Write Word
Read Transaction:	Read Word
Format:	ULINEAR16 Relative or Absolute per VOUT_MODE
Phased:	No
NVM Backup:	EEPROM
Updates:	On-the-fly

The VOUT_OV_FAULT_LIMIT command sets the value of the output voltage measured at the sense or output pins that causes an output overvoltage fault. VOUT_OV_FAULT_LIMIT sets an overvoltage threshold relative to the current VOUT_COMMAND. Updates to VOUT_COMMAND do not update the value of VOUT_OV_FAULT_LIMIT when the absolute format is used. Note that even with VOUT_MODE configured in absolute format, the true overvoltage fault limit remains relative to the current VOUT_COMMAND. VOUT_OV_FAULT_LIMIT is active as soon as the TPSM8D6C24 completes its power-on reset, even if output conversion is disabled.

Following an overvoltage fault condition, the TPSM8D6C24 responds according to VOUT_OV_FAULT_RESPONSE.

Figure 6-39 (40h) VOUT_OV_FAULT_LIMIT Register Map

15	14	13	12	11	10	9	8
RW	RW	RW	RW	RW	RW	RW	RW
VOUT_OVF (High Byte)

7	6	5	4	3	2	1	0
RW	RW	RW	RW	RW	RW	RW	RW
VOUT_OVF (Low Byte)

LEGEND: R/W = Read/Write; R = Read only

Table 6-50 Register Field Descriptions

Bit	Field	Access	Reset	Description
15:0	VOUT_ OVF	RW	See Below	Sets the overvoltage fault limit. Format is per VOUT_ MODE.

Hardware Support and Value Mapping

The hardware for VOUT_OV_FAULT_LIMIT is implemented as a fixed percentage of the current output voltage target. Depending on the VOUT_MODE setting, the value written to VOUT_OV_FAULT_LIMIT must be mapped to the hardware percentage.

Programmed values not exactly equal to one of the hardware relative values are rounded up to the next available relative value supported by hardware. The hardware supports values from 105% to 140% of VOUT_COMMAND in 2.5% steps. When output conversion is disabled, the hardware supports values from 110% to 140% of VOUT_COMMAND in 10% steps.

Attempts to write VOUT_OV_FAULT_LIMIT to any value outside those specified as valid are considered invalid or unsupported data and cause the TPSM8D6C24 to respond by flagging the appropriate status bits and notifying the host according to the PMBus 1.3.1 Part II specification section 10.9.3.