JAJSKD0 December   2023 TRF1305B2

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - TRF1305B2
    6. 6.6 Typical Characteristics - TRF1305B2
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Differential Amplifier
      2. 7.3.2 Output Common-Mode Control
      3. 7.3.3 Internal Resistor Configuration
    4. 7.4 Device Functional Modes
      1. 7.4.1 MODE Pin
        1. 7.4.1.1 Input Common-Mode Extension
      2. 7.4.2 Power-Down Mode
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Interface Considerations
        1. 8.1.1.1 Single-Ended Input
        2. 8.1.1.2 Differential Input
        3. 8.1.1.3 DC Coupling Considerations
      2. 8.1.2 Gain Adjustment With External Resistors in a Differential Input Configuration
    2. 8.2 Typical Application
      1. 8.2.1 TRF1305x2 as ADC Driver in a Zero-IF Receiver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Supply Voltages
      2. 8.3.2 Single-Supply Operation
      3. 8.3.3 Split-Supply Operation
      4. 8.3.4 Supply Decoupling
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Detailed Design Procedure

The first step is to choose the TRF1305x2 supplies. Ensure that the midsupply voltage, VMIDSUPPLY, is between the ADC common-mode (CM) voltage and the mixer CM voltage. VMIDSUPPLY is typically positioned closer to the ADC CM because the output CM range of the amplifier is less than the input CM range. Ensure that the dc of the signal at the input and output of the amplifier are within the valid operating common-mode voltage range. Use the MODE pin for cases where an extended range of the input CM is required.

GUID-20221012-SS0I-85W1-VMLC-WTJZSRZXP4R5-low.svg Figure 8-7 Choosing Supply Voltages with Given Common-Mode Voltages

Figure 8-7 shows how VMIDSUPPLY is chosen to be 0.8 V, so that the amplifier input has a CM offset from VMIDSUPPLY of 0.8 V and output has a CM offset from VMIDSUPPLY of 0.4 V (1.2 V – 0.8 V). The CM offsets are within the valid common-mode range of the amplifier, so the supplies of the TRF1305B2 are chosen to be VS+ = 3.3 V (0.8 V + 2.5 V) and VS– = −1.7 V (0.8 V – 2.5 V). Further optimization in the choice of supply is possible by selecting the input and output CM voltages for the best OIP3 performance. Section 8.2.1.3 has contour graphs that show OIP3 across input and output common-mode voltages.

The output CM is greater than the input CM; therefore, a net 6.9‑mA ((1.2 V – 0 V) / (161 Ω + 12.5 Ω)) dc current flows from the output to input through the internal feedback resistors. Depending on the choice of the passive mixer, this current can required to be sunk outside the mixer so that the bias conditions of the mixer are not disturbed. A 250‑Ω pulldown resistor connected to the INP pin to −1.7 V supply is adequate. If the 6.9‑mA dc current is sourced entirely from the amplifier, then the output headroom can be affected. Therefore, source the current externally from the supply using a pair of pullup resistors connected to the amplifier outputs. 300‑Ω pullup resistors from OUTP and OUTM to 3.3 V are adequate.

The I-channel mixer output has a 50‑Ω port and is connected to the amplifier INP pin through a small (4.7 Ω) series resistor. The INM pin is terminated to ground through a 55‑Ω resistor and to −1.7 V through a 250‑Ω resistor. This configuration makes sure that the impedance the amplifier sees at the input pins is the same at both INP and INM pins. The impedance of the mixer is close to 43 Ω and provides better than a −20‑dB return loss (theoretically). Be aware that there is some drop in the gain due to these resistor networks. Also, the values of the resistors chosen in Figure 8-6 are a good starting point; in practice, some adjustment is often needed to simultaneously meet the dc conditions and the RF performance.

At the amplifier output, 50‑Ω series resistors are used to match to the antialiasing filter with 100‑Ω differential input impedance. The filter output is connected to ADC with appropriate matching. Figure 8-6 only shows the I-channel; the Q-channel has an identical configuration.