JAJSKD0 December   2023 TRF1305B2

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - TRF1305B2
    6. 6.6 Typical Characteristics - TRF1305B2
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Differential Amplifier
      2. 7.3.2 Output Common-Mode Control
      3. 7.3.3 Internal Resistor Configuration
    4. 7.4 Device Functional Modes
      1. 7.4.1 MODE Pin
        1. 7.4.1.1 Input Common-Mode Extension
      2. 7.4.2 Power-Down Mode
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Interface Considerations
        1. 8.1.1.1 Single-Ended Input
        2. 8.1.1.2 Differential Input
        3. 8.1.1.3 DC Coupling Considerations
      2. 8.1.2 Gain Adjustment With External Resistors in a Differential Input Configuration
    2. 8.2 Typical Application
      1. 8.2.1 TRF1305x2 as ADC Driver in a Zero-IF Receiver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Supply Voltages
      2. 8.3.2 Single-Supply Operation
      3. 8.3.3 Split-Supply Operation
      4. 8.3.4 Supply Decoupling
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Gain Adjustment With External Resistors in a Differential Input Configuration

The TRF1305x2 allow minor gain adjustments by configuring the input external resistive network that is part of the differential input configuration. Figure 8-5 shows the external input network that comprises of a shunt resistor, RIN_SH, and two series input resistors, RIN_SER, connected to the input pins of the amplifier.

GUID-20221014-SS0I-JVC8-DBGQ-KQFFCBCMFHFG-low.svg Figure 8-5 Gain Adjustment With External Resistor Network

Table 8-1 provides resistor configurations for a 100‑Ω differential source impedance.

Table 8-1 Resistor Table for RS = 100 Ω
TRF1305B2
POWER GAIN (dB) RIN_SH (Ω) RIN_SER (Ω)
10 1000 25
9 408 30
8 267 35
7 204 41
6 169 47
5 146 54

Use external resistive attenuation network only for small gain adjustments because there is a dB-to-dB noise figure degradation with the resistive attenuators. Use an amplifier version that requires minimal attenuation for achieving the overall gain.

For example, to realize 10‑dB overall gain with RS = 100‑Ω differential, the two options are:

  1. TRF1305B2 with RIN_SH = 1000 Ω and RIN_SER = 25‑Ω resistors
  2. TRF1305A2 with RIN_SH = 125 Ω and RIN_SER = 49‑Ω resistors

Option 1 is recommended because the NF is better by approximately 3 dB compared to option 2.