JAJSH41 データシート

JAJSH41H March 2007 – August 2022 TS3A24159

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

DGS|10
- MPDS035C
YZP|10
- MXBG069I
DRC|10
- MPDS117L

サーマルパッド・メカニカル・データ

DRC|10
- QFND013N

発注情報

6.6 Electrical Characteristics for 2.5-V Supply

V_CC = 2.3 V to 2.7 V, T_A = –40°C to 85°C (unless otherwise noted) ⁽¹⁾

PARAMETER		TEST CONDITIONS		T_A	V_CC	MIN	TYP	MAX	UNIT
ANALOG SWITCH
Analog signal range	V_COM, V_NO, V_NC					0		V_CC	V
Peak ON resistance	r_peak	0 ≤ (V_NO or V_NC) ≤ V_CC, I_COM = –8 mA,	Switch ON, See Figure 7-1	25°C	2.3 V			0.35	Ω
Peak ON resistance	r_peak	0 ≤ (V_NO or V_NC) ≤ V_CC, I_COM = –8 mA,	Switch ON, See Figure 7-1	Full	2.3 V			0.45	Ω
ON-state resistance	r_on	V_NO or V_NC = 1.8 V, I_COM = –8 mA,	Switch ON, See Figure 7-1	25°C	2.3 V				Ω
ON-state resistance	r_on	V_NO or V_NC = 1.8 V, I_COM = –8 mA,	Switch ON, See Figure 7-1	Full	2.3 V			0.4	Ω
ON-state resistance match between channels	Δr_on	V_NO or V_NC = 1.8 V, 0.8 V, I_COM = –8 mA,	Switch ON, See Figure 7-1	25°C	2.3 V		0.01	0.05	Ω
ON-state resistance match between channels	Δr_on	V_NO or V_NC = 1.8 V, 0.8 V, I_COM = –8 mA,	Switch ON, See Figure 7-1	Full	2.3 V		0.05	0.05	Ω
ON-state resistance flatness	r_on(flat)	0 ≤ (V_NO or V_NC) ≤ V_CC, I_COM = –8 mA,	Switch ON, See Figure 7-1	25°C	2.3 V		0.05		Ω
		V_NO or V_NC = 0.8 V, 1.8 V, I_COM = –8 mA,	Switch ON, See Figure 7-1	25°C			0.03	0.08
		V_NO or V_NC = 0.8 V, 1.8 V, I_COM = –8 mA,	Switch ON, See Figure 7-1	Full				0.1
NC, NO OFF leakage current	I_NC(OFF), I_NO(OFF)	V_NC or V_NO = 0.5 V, V_COM = 2.2 V, or V_NC or V_NO = 2.2 V, V_COM = 0.5 V,	Switch OFF, See Figure 7-2	25°C	2.7 V	–10		10	nA
NC, NO OFF leakage current	I_NC(OFF), I_NO(OFF)		Switch OFF, See Figure 7-2	Full	2.7 V	–50		50	nA
NC, NO ON leakage current	I_NC(ON), I_NO(ON)	V_NC or V_NO = 0.5 V, V_COM = Open, or V_NC or V_NO = 2.2 V, V_COM = Open,	Switch ON, See Figure 7-3	25°C	2.7 V	–10		10	nA
NC, NO ON leakage current	I_NC(ON), I_NO(ON)		Switch ON, See Figure 7-3	Full	2.7 V	–100		100	nA
ANALOG SWITCH (continued)
COM ON leakage current	I_COM(ON)	V_NC or V_NO = Open, V_COM = 0.5 V, or V_NC or V_NO = Open, V_COM = 2.2 V,	Switch ON, See Figure 7-3	25°C	2.7 V	–10		10	nA
COM ON leakage current	I_COM(ON)		Switch ON, See Figure 7-3	Full	2.7 V	–100		100	nA
DIGITAL CONTROL INPUTS (IN1, IN2)⁽²⁾
Input logic high	V_IH			Full		1.25			V
Input logic low	V_IL			Full				0.5	V
Input leakage current	I_IH, I_IL	V_I = 2.7 V or 0		25°C	2.7 V	–40	5	40	nA
Input leakage current	I_IH, I_IL	V_I = 2.7 V or 0		Full	2.7 V	–50		50	nA
DYNAMIC
Charge injection	Q_C	V_GEN = 0, R_GEN = 0,	C_L = 1 nF, See Figure 7-10	25°C	2.5 V		8		pC
NC, NO OFF capacitance	C_NC(OFF), C_NO(OFF)	V_NC or V_NO = V_CC or GND, Switch OFF,	See Figure 7-4	25°C	2.5 V		90		pF
NC, NO ON capacitance	C_NC(ON), C_NO(ON)	V_NC or V_NO = V_CC or GND, Switch ON,	See Figure 7-4	25°C	2.5 V		250		pF
COM ON capacitance	C_COM(ON)	V_COM = V_CC or GND, Switch ON,	See Figure 7-4	25°C	2.5 V		250		pF
Digital input capacitance	C_I	V_I = V_CC or GND,	See Figure 7-4	25°C	2.5 V		2		pF
Bandwidth	BW	R_L = 50 Ω, Switch ON,	See Figure 7-7	25°C	2.5 V		23		MHz
OFF isolation	O_ISO	R_L = 50 Ω, f = 1 MHz,	See Figure 7-8	25°C	2.5 V		–72		dB
Crosstalk	X_TALK	R_L = 50 Ω, f = 1 MHz,	See Figure 7-9	25°C	2.5 V		–96		dB
Total harmonic distortion	THD	R_L = 600 Ω, C_L = 50 pF,	f = 20 Hz to 20 kHz, See Figure 7-11	25°C	2.5 V		0.003%
SUPPLY
Positive supply current	I_CC	V_I = V_CC or GND		25°C	2.7 V		10	100	nA
Positive supply current	I_CC	V_I = V_CC or GND		Full	2.7 V		700		nA

(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.

(2) All unused digital inputs of the device must be held at V_CC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs.