JAJSFJ4H January   2005  – May 2018 TS3A5018

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      ブロック図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics for 3.3-V Supply
    6. 6.6  Electrical Characteristics for 2.5-V Supply
    7. 6.7  Electrical Characteristics for 2.1-V Supply
    8. 6.8  Electrical Characteristics for 1.8-V Supply
    9. 6.9  Switching Characteristics for 3.3-V Supply
    10. 6.10 Switching Characteristics for 2.5-V Supply
    11. 6.11 Switching Characteristics for 1.8-V Supply
    12. 6.12 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram (Each Switch)
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デバイスの項目表記
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • PW|16
  • DBQ|16
  • RGY|16
  • D|16
  • DGV|16
  • RSV|16
サーマルパッド・メカニカル・データ
発注情報

6.8 Electrical Characteristics for 1.8-V Supply

V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER TEST CONDITIONS TA V+ MIN TYP MAX UNIT
VCOM, VNC, VNO Analog signal range 0 V+ V
ron ON-state
resistance		 0 ≤ (VNC or VNO) ≤ V+,
ICOM = –32 mA,		 Switch ON,
see Figure 17 		25°C 1.65 V 5.5 17 Ω
Full 32
Δron ON-state
resistance match between channels		 VNC or VNO = 1.5 V,
ICOM = –32 mA,		 Switch ON,
see Figure 17 		25°C 1.65 V 0.3 1 Ω
Full 1.2
ron(flat) ON-state
resistance
flatness		 0 ≤ (VNC or VNO)  ≤ V+,
ICOM = –32 mA,		 Switch ON,
see Figure 17 		25°C 1.65 V 2.7 5.5 Ω
Full 7.3
INC(OFF),
INO(OFF) 		NC, NO
OFF leakage current		 VNC or VNO = 0.3 V,
VCOM = 1.65V,
or
VNC or VNO = 1.65V,
VCOM = 0.3 V, 		Switch OFF,
see Figure 18 		25°C 1.95 V –0.25 0.03 0.25 µA
Full –4.5 4.5
VNC or VNO = 1.95 V to 0 V,
VCOM = 0 V to 1.95 V,
or
VNC or VNO = 0 V to 1.95 V,
VCOM = 1.95 V to 0 V, 		Switch OFF,
see Figure 18 		25°C 0 V –0.4 0.01 0.4
Full –6.5 6.5
ICOM(OFF) COM
OFF leakage current		 VCOM = 1.65 V,
VNC or VNO = 0.3V,
or
VCOM = 0.3 V,
VNC or VNO = 1.65V, 		Switch OFF,
see Figure 18 		25°C 1.95 V –0.4 0.02 0.4 µA
Full –0.9 0.9
VCOM = 0 V to 1.95 V,
VNC or VNO = 1.95 V to 0 V,
or
VCOM = 1.95 V to 0,
VNC or VNO = 0 to 1.95 V, 		Switch OFF,
see Figure 18 		25°C 0 V –0.4 0.02 0.4
Full –4.5 4.5
INC(ON),
INO(ON) 		NC, NO
ON leakage
current		 VNC or VNO = 0.3 V,
VCOM = Open,
or
VNC or VNO = 1.65 V,
VCOM = Open,		 Switch ON,
see Figure 19 		25°C 1.95 V –2. 0.02 2 µA
Full –2 0.02 2
ICOM(ON) COM
ON leakage
current		 VCOM = 0.3 V,
VNC or VNO = Open,
or
VCOM = 1.65 V,
VNC or VNO = Open, 		Switch ON,
see Figure 19 		25°C 1.95 V –4.5 4.5 µA
Full
VIH Input logic high VI = V+ or GND Full 1.95 V 1 3.6 V
VIL Input logic low Full 1.95 V 0 0.4 V
IIH, IIL Input leakage current VI = V+ or 0 25°C 1.95 V –0.1 0.01 0.1 µA
Full –2.1 2.1
(1) The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.