JAJSEO8C February 2018 – September 2019 TS3USBCA4
PRODUCTION DATA.
TEST CONDITIONS | MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|---|
tON_MICGND | Switch ON time for MIC/AGND path | VPU=1.8V, RPU=2100Ω, CL=50pF | 10 | µs | ||
tOFF_MICGND | Switch OFF time for MIC/AGND path | VPU=1.8V, RPU=2100Ω, CL=50pF | 5 | µs | ||
tON_HS | Switch ON time for high-speed path | RS=50Ω, RL =50Ω | 1.1 | µs | ||
tOFF_HS | Switch OFF time for high-speed path | RS=50Ω, RL =50Ω | 725 | ns | ||
tBBM | Break before make off time for MIC/AGND path | VPU=1.8V, RPU=2100Ω, RL=50Ω, CL=50pF | 1300 | ns | ||
tFLIP | Response time for the FLIP pin | RS=50Ω, RL=50Ω | 1 | µs | ||
tDEV_ENABLE | Device enable time from OEn = L to device ready | OEn=L | 350 | µs | ||
tDEV_DISABLE | Device disable time from OEn = H to device shutdown | OEn=H | 175 | ns | ||
tD_PG | VCC (MIN) to Internal Power Good asserted high (Refer to Figure 1) | OEn=L | 250 | µs | ||
tCFG_DB | Debounce time for SEL[1:0] and I2C_EN configuration pins (Refer to Figure 1) | OEn=L | 150 | ns | ||
tVCC_RAMP | VCC power supply (0 – 100%) ramp time requirement (Refer to Figure 1) | 0.1 | 100 | ms |