JAJSNE5F October   2005  – December 2021 TS5A3359

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics for 5-V Supply
    6. 6.6 Electrical Characteristics for 3.3-V Supply
    7. 6.7 Electrical Characteristics for 2.5-V Supply
    8. 6.8 Electrical Characteristics for 1.8-V Supply
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Electrical Characteristics for 3.3-V Supply

VCC = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETERTEST CONDITIONSTAVCCMINTYPMAXUNIT
ANALOG SWITCH
Analog signal rangeVCOM, VNO0VCCV
Peak ON resistancerpeak0 ≤ (VNO) ≤ VCC,
ICOM = –100 mA,		Switch ON,
See Figure 7-1		25°C3 V1.31.6Ω
Full2
ON-state resistanceronVNO = 2 V,
ICOM = –100 mA,		Switch ON,
See Figure 7-1		25°C3 V1.21.6Ω
Full1.8
ON-state resistance
match between channels		ΔronVNO = 2 V, 0.8 V,
ICOM = –100 mA,		Switch ON,
See Figure 7-1		25°C3 V0.10.15Ω
Full0.15
ON-state
resistance flatness		ron(flat)0 ≤ (VNO) ≤ VCC,
ICOM = –100 mA,		Switch ON,
See Figure 7-1		25°C3 V0.2Ω
VNO = 2 V, 0.8 V,
ICOM = –100 mA,		Switch ON,
See Figure 7-1		25°C0.20.35
Full0.35
NO
OFF leakage current		INO(OFF)VNO = 1 V or 3 V,
VCOM = 1 V to 3 V,		Switch OFF,
See Figure 7-2		25°C3.6 V–15315nA
Full–3030
INO(PWROFF)VNO = 0 to 3.6 V,
VCOM = 3.6 V to 0,		Switch OFF,
See Figure 7-2		25°C0 V–10.21μA
Full–1010
NO
ON leakage current		INO(ON)VNO = 1 V or 3 V,
VCOM = Open,		Switch ON,
See Figure 7-2		25°C3.6 V–15315nA
Full–4040
COM
OFF leakage current		ICOM(OFF)VNO = 0 V to 3.6 V,
VCOM = 1 V or
VNO = 3.6 V to 0,
VCOM = 3 V,		Switch OFF,
See Figure 7-2		25°C3.6 V–15315nA
Full–7575
ICOM(PWROFF)VCOM = 0 to 3.6 V,
VNO = 3.6 V to 0,		Switch OFF,
See Figure 7-2		25°C0 V–10.21μA
Full–2020
COM
ON leakage current		ICOM(ON)VNO = Open,
VCOM = 1 V or 3 V,		Switch ON,
See Figure 7-2		25°C3.6 V–15415nA
Full–4040
DIGITAL CONTROL INPUTS (IN1, IN2)(2)
Input logic highVIHFull25.5V
Input logic lowVILFull00.8V
Input leakage
current		IIH, IILVI = 5.5 V or 025°C3.6 V–22nA
Full–2020
DYNAMIC
Turnon timetONVCOM = VCC,
RL = 50 Ω,		CL = 35 pF,
See Figure 7-5		25°C3.3 V11630.5ns
Full3 V to 3.6 V134
Turnoff timetOFFVCOM = VCC,
RL = 50 Ω,		CL = 35 pF,
See Figure 7-5		25°C3.3 V1611.5ns
Full3 V to 3.6 V112.5
Break-before-
make time		tBBMVNO = VCC,
RL = 50 Ω,		CL = 35 pF,
See Figure 7-6		25°C3.3 V0.51326ns
Full3 V to 3.6 V0.530
Charge
injection		QCVGEN = 0,
RGEN = 0,		CL = 1 nF,
See Figure 7-10		25°C3.3 V12pC
NO
OFF capacitance		CNO(OFF)VNO = VCC or GND,
Switch OFF,		See Figure 7-425°C3.3 V18pF
COM
OFF capacitance		CCOM(OFF)VCOM = VCC or GND,
Switch OFF,		See Figure 7-425°C3.3 V55pF
NO
ON capacitance		CNO(ON)VNO = VCC or GND,
Switch ON,		See Figure 7-425°C3.3 V78pF
COM
ON capacitance		CCOM(ON)VCOM = VCC or GND,
Switch ON,		See Figure 7-425°C3.3 V78pF
Digital input
capacitance		CIVI = VCC or GND,See Figure 7-425°C3.3 V2.5pF
BandwidthBWRL = 50 Ω,
Switch ON,		See Figure 7-725°C3.3 V73MHz
OFF isolationOISORL = 50 Ω,
f = 1 MHz,		Switch OFF,
See Figure 7-8		25°C3.3 V–64dB
CrosstalkXTALKRL = 50 Ω,
f = 1 MHz,		Switch ON,
See Figure 7-9		25°C3.3 V–64dB
Total harmonic distortionTHDRL = 600 Ω,
CL = 50 pF,		f = 20 Hz to 20 kHz,
See Figure 7-11		25°C3.3 V0.01%
SUPPLY
Positive supply
current		ICCVI = VCC or GND,Switch ON or OFF25°C3.6 V220nA
Full350
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(2) All unused digital inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs (SCBA004).