SNLS757 June 2024 TUSB2E221
ADVANCE INFORMATION
The CROSS pin will control the orientation of the integrated cross bar mux.
After the RESETDB deassertion followed by internally generated reset signal and 1ms delay, the CROSS pin is sampled and latched.
The system must make sure that CROSS meets t_su_CROSS and t_hd_CROSS with respect to power supply ramp and RESETB deassertion per Power Supply Recommendations.
Changes to the state of the CROSS input while RESETB is high are ignored.
CROSS = 0 | CROSS = 1 | |
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eUSB0 (eDP0, eDN0) | USBA (DPA, DNA) | USBB (DPB, DNB) |
eUSB1 (eDP1, eDN1) | USBB (DPB, DNB) | USBA (DPA, DNA) |