JAJSF53E
July 2015 – July 2024
TUSB4020BI
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings #GUID-E9510BAC-794F-43CD-A047-0D0FFB7C50BE/ABSMAXNOTE
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
3.3V I/O Electrical Characteristics
5.6
Hub Input Supply Current
5.7
Power-Up Timing Requirements
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Battery Charging Features
6.3.2
USB Power Management
6.3.3
Clock Generation
6.3.4
Power-Up and Reset
6.4
Device Functional Modes
6.4.1
External Configuration Interface
6.5
Programming
6.5.1
One-Time Programmable (OTP) Configuration
6.5.2
I2C EEPROM Operation
6.5.3
SMBus Target Operation
6.6
Register Maps
6.6.1
Configuration Registers
6.6.1.1
ROM Signature Register (offset = 0h) [reset = 0h]
6.6.1.2
Vendor ID LSB Register (offset = 1h) [reset = 51h]
6.6.1.3
Vendor ID MSB Register (offset = 2h) [reset = 4h]
6.6.1.4
Product ID LSB Register (offset = 3h) [reset = 25h]
6.6.1.5
Product ID MSB Register (offset = 4h) [reset = 80h]
6.6.1.6
Device Configuration Register (offset = 5h) [reset = 1Xh]
6.6.1.7
Battery Charging Support Register (offset = 6h) [reset = 0Xh]
6.6.1.8
Device Removable Configuration Register (offset = 7h) [reset = 0Xh]
6.6.1.9
Port Used Configuration Register (offset = 8h) [reset = 0h]
6.6.1.10
PHY Custom Configuration Register (offset = 9h) [reset = 0h]
6.6.1.11
Device Configuration Register 2 (offset = Ah)
6.6.1.12
UUID Registers (offset = 10h to 1Fh)
6.6.1.13
Language ID LSB Register (offset = 20h)
6.6.1.14
Language ID MSB Register (offset = 21h)
6.6.1.15
Serial Number String Length Register (offset = 22h)
6.6.1.16
Manufacturer String Length Register (offset = 23h)
6.6.1.17
Product String Length Register (offset = 24h)
6.6.1.18
Serial Number Registers (offset = 30h to 4Fh)
6.6.1.19
Manufacturer String Registers (offset = 50h to 8Fh)
6.6.1.20
Product String Registers (offset = 90h to CFh)
6.6.1.21
Additional Feature Configuration Register (offset = F0h)
6.6.1.22
Charging Port Control Register (offset = F2h)
6.6.1.23
Device Status and Command Register (offset = F8h)
7
Application and Implementation
7.1
Application Information
7.1.1
Crystal Requirements
7.1.2
Input Clock Requirements
7.2
Typical Applications
7.2.1
Upstream Port Implementation
7.2.1.1
Design Requirements
7.2.1.2
Detailed Design Procedure
7.2.1.3
Application Curves
7.2.2
Downstream Port 1 Implementation
7.2.3
Downstream Port 2 Implementation
7.2.4
VBUS Power Switch Implementation
7.2.5
Clock, Reset, and Miscellaneous
7.2.6
Power Implementation
7.3
Power Supply Recommendations
7.3.1
Power Supply
7.3.2
Downstream Port Power
7.3.3
Ground
7.4
Layout
7.4.1
Layout Guidelines
7.4.1.1
Placement
7.4.1.2
Package Specific
7.4.1.3
Differential Pairs
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Related Documentation
8.2
ドキュメントの更新通知を受け取る方法
8.3
サポート・リソース
8.4
Trademarks
8.5
静電気放電に関する注意事項
8.6
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PHP|48
MPQF051B
サーマルパッド・メカニカル・データ
6.6.1.9
Port Used Configuration Register (offset = 8h) [reset = 0h]
Figure 6-10 Register Offset 8h
7
6
5
4
3
2
1
0
0
0
0
0
0
0
1
1
R
R
R
R
R
R
R
R
LEGEND: R/W = Read/Write; R = Read only; –n = value after reset
Table 6-12 Port Used Configuration Register
Bit
Field
Type
Reset
Description
7:0
RSVD
R
0h
Reserved. Read only.