JAJSUV7C July   2015  – July 2024 TUSB4041I-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 3.3-V I/O Electrical Characteristics
    6. 5.6 Power-Up Timing Requirements
    7. 5.7 Hub Input Supply Current
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Battery Charging Features
      2. 6.3.2 USB Power Management
      3. 6.3.3 One-Time Programmable Configuration
      4. 6.3.4 Clock Generation
      5. 6.3.5 Crystal Requirements
      6. 6.3.6 Input Clock Requirements
      7. 6.3.7 Power-Up and Reset
    4. 6.4 Device Functional Modes
      1. 6.4.1 External Configuration Interface
      2. 6.4.2 I2C EEPROM Operation
      3. 6.4.3 SMBus Target Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Upstream Port Implementation
        2. 7.2.2.2 Downstream Port 1 Implementation
        3. 7.2.2.3 Downstream Port 2 Implementation
        4. 7.2.2.4 Downstream Port 3 Implementation
        5. 7.2.2.5 Downstream Port 4 Implementation
        6. 7.2.2.6 VBUS Power Switch Implementation
        7. 7.2.2.7 Clock, Reset, and Miscellaneous
        8. 7.2.2.8 TUSB4041I-Q1 Power Implementation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 TUSB4041I-Q1 Power Supply
      2. 7.3.2 Downstream Port Power
      3. 7.3.3 Ground
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Placement
        2. 7.4.1.2 Package Specific
        3. 7.4.1.3 Differential Pairs
      2. 7.4.2 Layout Example
  9. 8 Register Maps
    1. 8.1  Configuration Registers
    2. 8.2  ROM Signature Register
    3. 8.3  Vendor ID LSB Register
    4. 8.4  Vendor ID MSB Register
    5. 8.5  Product ID LSB Register
    6. 8.6  Product ID MSB Register
    7. 8.7  Device Configuration Register
    8. 8.8  Battery Charging Support Register
    9. 8.9  Device Removable Configuration Register
    10. 8.10 Port Used Configuration Register
    11. 8.11 Device Configuration Register 2
    12. 8.12 USB 2.0 Port Polarity Control Register
    13. 8.13 UUID Byte N Register
    14. 8.14 Language ID LSB Register
    15. 8.15 Language ID MSB Register
    16. 8.16 Serial Number String Length Register
    17. 8.17 Manufacturer String Length Register
    18. 8.18 Product String Length Register
    19. 8.19 Serial Number String Registers
    20. 8.20 Manufacturer String Registers
    21. 8.21 Product String Byte N Register
    22. 8.22 Additional Feature Configuration Register
    23. 8.23 Device Status and Command Register
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.3 One-Time Programmable Configuration

The TUSB4041I-Q1 device allows device configuration through one-time programmable (OTP) non-volatile memory. The programming of the OTP is supported using vendor-defined USB device requests. Contact TI for details using the OTP features

Table 6-2 lists features that can be configured using the OTP.

Table 6-2 OTP Configurable Features
CONFIGURATION REGISTER OFFSETBIT FIELDDESCRIPTION
REG_01h[7:0]Vendor ID LSB
REG_02h[7:0]Vendor ID MSB
REG_03h[7:0]Product ID LSB
REG_04h[7:0]Product ID MSB
REG_07h[0]Port-removable configuration for downstream ports 1. OTP configuration is inverse of rmbl[3:0], that is 1 = not removable, 0 = removable.
REG_07h[1]Port-removable configuration for downstream ports 2. OTP configuration is inverse of rmbl[3:0], that is 1 = not removable, 0 = removable.
REG_07h[2]Port-removable configuration for downstream ports 3. OTP configuration is inverse of rmbl[3:0], that is 1 = not removable, 0 = removable.
REG_07h[3]Port-removable configuration for downstream ports 4. OTP configuration is inverse of rmbl[3:0], that is 1 = not removable, 0 = removable.
REG_0Ah[3]Enable device attach detection
REG_0Ah[4]High-current divider mode enable
REG_0Bh[0]USB 2.0 port polarity configuration for downstream ports 1
REG_0Bh[1]USB 2.0 port polarity configuration for downstream ports 2
REG_0Bh[2]USB 2.0 port polarity configuration for downstream ports 3
REG_0Bh[3]USB 2.0 port polarity configuration for downstream ports 4
REG_F0h[3:1]USB power switch power-on delay