JAJSDH7B June   2017  – May 2019 TUSB546A-DCI

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      TUSB546A-DCIのアイ・ダイアグラム
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Supply Characteristics
    6. 7.6  DC Electrical Characteristics
    7. 7.7  AC Electrical Characteristics
    8. 7.8  DCI Specific Electrical Characteristics
    9. 7.9  Timing Requirements
    10. 7.10 Switching Characteristics
    11. 7.11 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 USB 3.1
      2. 9.3.2 DisplayPort
      3. 9.3.3 4-level Inputs
      4. 9.3.4 Receiver Linear Equalization
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device Configuration in GPIO Mode
      2. 9.4.2 Device Configuration In I2C Mode
      3. 9.4.3 DisplayPort Mode
      4. 9.4.4 Linear EQ Configuration
      5. 9.4.5 USB3.1 Modes
      6. 9.4.6 Operation Timing – Power Up
    5. 9.5 Programming
    6. 9.6 Register Maps
      1. 9.6.1 General Register (address = 0x0A) [reset = 00000001]
        1. Table 11. General Registers
      2. 9.6.2 DisplayPort Control/Status Registers (address = 0x10) [reset = 00000000]
        1. Table 12. DisplayPort Control/Status Registers (0x10)
      3. 9.6.3 DisplayPort Control/Status Registers (address = 0x11) [reset = 00000000]
        1. Table 13. DisplayPort Control/Status Registers (0x11)
      4. 9.6.4 DisplayPort Control/Status Registers (address = 0x12) [reset = 00000000]
        1. Table 14. DisplayPort Control/Status Registers (0x12)
      5. 9.6.5 DisplayPort Control/Status Registers (address = 0x13) [reset = 00000000]
        1. Table 15. DisplayPort Control/Status Registers (0x13)
      6. 9.6.6 USB3.1 Control/Status Registers (address = 0x20) [reset = 00000000]
        1. Table 16. USB3.1 Control/Status Registers (0x20)
      7. 9.6.7 USB3.1 Control/Status Registers (address = 0x21) [reset = 00000000]
        1. Table 17. USB3.1 Control/Status Registers (0x21)
      8. 9.6.8 USB3.1 Control/Status Registers (address = 0x22) [reset = 00000100]
        1. Table 18. USB3.1 Control/Status Registers (0x22)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
    3. 10.3 System Examples
      1. 10.3.1 USB 3.1 Only
      2. 10.3.2 USB 3.1 and 2 Lanes of DisplayPort
      3. 10.3.3 DisplayPort Only
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 開発サポート
    2. 13.2 関連リンク
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 コミュニティ・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.8 DCI Specific Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DCI_CLK and DCI_DAT LVCMOS Outputs
VOL Low-Level output voltage VCC = 3 V; IOL = 2 mA; CL = 10 pF 0.45 V
VOH High-Level output voltage VCC = 3 V; IOL = –2 mA; 2.4 V
RDCI Output characteristic impedance 21 25 33 Ω
tPERIOD DCI Clock period Measured at 50% 6.67 ns
tVALID Rising edge of DCI clock to DCI data valid 1 ns
tDCI_RISE DCI output rise time Measured at 20% to 80%. 350 ps
tDCI_FALL DCI output fall time Measured at 80% to 20% 350 ps