JAJSHM9 June 2019 TUSB8043A
PRODUCTION DATA.
Bit No. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reset State | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | Field | Type | Description |
---|---|---|---|
7:5 | Reserved | RW | Reserved. This field defaults to 3'b000 and must not be changed. |
4 | stsOutputEn | RW | Status output enable. This field when set enables of the Status output signals, HS_UP, HS_SUSPEND, SS_UP, SS_SUSPEND.
0 = STS outputs are disabled. 1 = STS outputs are enabled. This bit may be loaded by EEPROM or over-written by a SMBUS host. |
3:1 | pwronTime | RW | Power On Delay Time. When the efuse_pwronTime field is all 0s, this field sets the delay time from the removal disable of PWRCTL to the enable of PWRCTL when transitioning battery charging modes. For example, when disabling the power on a transition from ACP to DCP Mode. The nominal timing is defined as follows:
Equation 1. TPWRON_EN = (pwronTime x 1) x 200 ms
This field may be over-written by EEPROM contents or by an SMBus host. |
0 | usb3spreadDis | RW | USB3 Spread Spectrum Disable. This bit allows firmware to disable the spread spectrum function of the USB3 phy PLL.
0 = Spread spectrum function is enabled 1= Spread spectrum function is disabled This bit may be loaded by EEPROM or over-written by a SMBUS host. |