TUSB8044 4ポートUSB 3.1 Gen1ハブ、USB Billboard付き
- JAJSD86 April 2017 TUSB8044
  
  PRODUCTION DATA.

Full reading width

DATA SHEET

TUSB8044 4ポートUSB 3.1 Gen1ハブ、USB Billboard付き

このリソースの元の言語は英語です。翻訳は概要を便宜的に提供するもので、自動化ツール (機械翻訳) を使用していることがあり、TI では翻訳の正確性および妥当性につきましては一切保証いたしません。実際の設計などの前には、ti.com で必ず最新の英語版をご参照くださいますようお願いいたします。

1 特長

4ポートのUSB 3.1 Gen1ハブ
USB 2.0ハブ機能
- Multiple Transaction Translator (MTT)ハブ：4つのトランザクション・トランスレータ
- トランザクション・トレンスレータごとに2つの非同期エンドポイント・バッファ
サポートされるバッテリ充電
- 上流ポートの未接続または未構成時に、D+/D-デバイダ充電ポート(ACP1、ACP2、ACP3)をサポート
- 上流ポートの未接続時に、DCPまたはACPモードの自動移行モードをサポート
- Galaxy充電をサポート
- CDPモード(上流ポート接続時)
- DCPモード(上流ポート未接続時)
- DCPモードは中国電気通信業界標準YD/T 1591-2009に準拠
USB 3.1 Gen1またはUSB 2.0複合デバイスとしての動作をサポート
USB Billboardをサポート
ポート単位または一括制御のパワー・スイッチング、過電流通知入力
4つの外部下流ポートと内部USB 2.0専用ポートで、USB HID to I²C機能およびUSB2.0 Billboardをサポート
USB HIDを介したI²C制御用の内部下流ポートで、ハイ・スピードおよびフル・スピード動作をサポートし、上流ポートに対応するスピードを提供
I²Cの読み出し/書き込みと、100kおよび400k (デフォルト)でのEEPROMの読み出しに対するベンダー要求をサポート
I²Cマスタでクロック・ストレッチングをサポート
OTP ROM、シリアルEEPROM、またはI²C/SMBusスレーブ・インターフェイスで次のカスタム構成をサポート
- VIDおよびPID
- ポートのカスタマイズ
- メーカーおよび製品文字列(OTP ROMは除く)
- シリアル番号(OTP ROMは除く)
128ビットのUniversally Unique Identifier (UUID)を提供
USB 2.0上流ポート経由でオンボードおよびイン・システムのEEPROMプログラミングをサポート
単一クロック入力、24MHzクリスタルまたはオシレータ
下流ポートはUSB 2.0の構成のみ
64ピンQFNパッケージ(RGC)

2 アプリケーション

コンピュータ・システム、ドッキング・ステーション、モニタ、セットトップ・ボックス

3 概要

TUSB8044は4ポートのUSB 3.1 Gen1ハブです。上流ポートでスーパー・スピードUSBおよびハイ・スピード/フル・スピード接続を同時に提供し、下流ポートでスーパー・スピードUSB、ハイ・スピード、フル・スピード、ロー・スピード接続を提供します。ハイ・スピード、フル・スピード、ロー・スピード接続のみをサポートする電子環境に上流ポートが接続されている場合、スーパー・スピードUSB接続は下流ポートで無効化されます。

製品情報⁽¹⁾

型番	パッケージ	本体サイズ(公称)
TUSB8044	VQFN (64)	9.00mm×9.00mm

利用可能なすべてのパッケージについては、このデータシートの末尾にある注文情報を参照してください。

図

4 改訂履歴

日付	改訂内容	注
2017年4月	*	暫定版リリース

5 概要(続き)

フル・スピード、ロー・スピード接続のみをサポートする電子環境に上流ポートが接続されている場合、スーパー・スピードUSBおよびハイ・スピード接続は下流ポートで無効化されます。

TUSB8044は、ポート別または一括制御のパワー・スイッチングと過電流保護を提供し、バッテリ充電アプリケーションをサポートします。

ポート別電力制御のハブでは、USBホストからの要求に応じて各下流ポートへの電力がオン/オフされます。また、過電流を検出した場合には、影響を受ける下流ポートへの電力だけがオフになります。

一括制御のハブでは、いずれかのポートで電力が必要になると、すべての下流ポートへの給電をオンにします。下流ポートへの給電は、すべてのポートが給電を停止できる状態にならない限り、オフになりません。また、一括制御のハブが過電流イベントを検出すると、すべての下流ポートへの給電がオフになります。

TUSB8044の下流ポートは、Battery Charging Downstream Port (CDP)ハンドシェイクに対応することで、バッテリ充電アプリケーションにサポートを提供します。また、上流ポートの未接続時にDedicated Charging Port (DCP)をサポートします。DCPモードは、USBバッテリ充電、Galaxy充電、中国電気通信業界標準YD/T 1591-2009をサポートするUSBデバイスに対応します。上流ポートの未接続時、TUSB8044はさらに、デバイダ充電ポート・モード(ACPxモード)と、ACP3からDCPまでの全モード間の自動移行をサポートします。

TUSB8044に内蔵されたUSB2.0 Billboardデバイスは、「USB Device Class Definition for Billboard Devices Version 1.1」仕様をサポートします。Billboardデバイスは、TUSB8044 USB 2.0ハブの下流ポートのうち最も数字の大きいポートに接続されます。Billboardの目的は、Alternateモードのステータスをホスト・システムに伝えることです。TUSB8044がサポートするAlternateモードは1つだけです。

TUSB8044は、バッテリ充電サポートなどの機能のためにピン・ストラップ構成を提供しており、OTP ROM、I²C EEPROM、またはI²C/SMBusスレーブ・インターフェイスを介した、PID、VID、カスタム・ポート、PHY構成のカスタマイズをサポートしています。また、I²C EEPROMまたはI²C/SMBusスレーブ・インターフェイスを使用する場合、カスタム文字列をサポートします。

TUSB8044は、内部USB HIDからI²Cへのインターフェイスを介して、接続先のEEPROMのプログラミングをサポートします。

このデバイスは64ピンRGCパッケージで提供されます。0℃～70℃の温度範囲での動作向けには商用バージョンで提供されます。

6 Pin Configuration and Functions

RGC Package

64 Pin (VQFN)

(Top View)

Pin Functions

PIN		I/O	DESCRIPTION
NAME	NO.	I/O	DESCRIPTION
Clock and Reset Signals
GRSTz	50	I PU	Global power reset. This reset brings all of the TUSB8044 internal registers to their default states. When GRSTz is asserted, the device is completely nonfunctional.
XI	62	I	Crystal input. This pin is the crystal input for the internal oscillator. The input may alternately be driven by the output of an external oscillator. When using a crystal a 1-MΩ feedback resistor is required between XI and XO.
XO	61	O	Crystal output. This pin is the crystal output for the internal oscillator. If XI is driven by an external oscillator this pin may be left unconnected. When using a crystal a 1-MΩ feedback resistor is required between XI and XO.
USB Upstream Signals
USB_SSTXP_UP	55	O	USB SuperSpeed transmitter differential pair (positive)
USB_SSTXM_UP	56	O	USB SuperSpeed transmitter differential pair (negative)
USB_SSRXP_UP	58	I	USB SuperSpeed receiver differential pair (positive)
USB_SSRXM_UP	59	I	USB SuperSpeed receiver differential pair (negative)
USB_DP_UP	53	I/O	USB High-speed differential transceiver (positive)
USB_DM_UP	54	I/O	USB High-speed differential transceiver (negative)
USB_R1	64	I	Precision resistor reference. A 9.53-kΩ ±1% resistor should be connected between USB_R1 and GND.
USB_VBUS	48	I	USB upstream port power monitor. The VBUS detection requires a voltage divider. The signal USB_VBUS must be connected to VBUS through a 90.9-KΩ ±1% resistor, and to ground through a 10-kΩ ±1% resistor from the signal to ground.
USB Downstream Signals
USB_SSTXP_DN1	3	O	USB SuperSpeed transmitter differential pair (positive)
USB_SSTXM_DN1	4	O	USB SuperSpeed transmitter differential pair (negative)
USB_SSRXP_DN1	6	I	USB SuperSpeed receiver differential pair (positive)
USB_SSRXM_DN1	7	I	USB SuperSpeed receiver differential pair (negative)
USB_DP_DN1	1	I/O	USB High-speed differential transceiver (positive)
USB_DM_DN1	2	I/O	USB High-speed differential transceiver (negative)
PWRCTL1/BATEN1	36	I/O, PD	USB Port 1 Power On Control for Downstream Power/Battery Charging Enable. The pin is used for control of the downstream power switch for Port 1. This pin be left unconnected if power management is not implemented.
			In addition, the value of the pin is sampled at the de-assertion of reset to determine the value of the battery charging support for Port 1 as indicated in the Battery Charging Support register:
				0 = Battery charging not supported
				1 = Battery charging supported
OVERCUR1z	46	I, PU	USB Port 1 Over-Current Detection. This pin is typically connected to the over current output of the downstream port power switch for Port 1.
				0 = An over current event has occurred
				1 = An over current event has not occurred
			When GANGED power management is enabled, this pin or one of the other OVERCURz pins must be connected to the over current output of the power switch or circuit which detects the over current conditions. For the case when another OVERCURz pin is used, this pin can be left unconnected.
USB_SSTXP_DN2	11	O	USB SuperSpeed transmitter differential pair (positive)
USB_SSTXM_DN2	12	O	USB SuperSpeed transmitter differential pair (negative)
USB_SSRXP_DN2	14	I	USB SuperSpeed receiver differential pair (positive)
USB_SSRXM_DN2	15	I	USB SuperSpeed receiver differential pair (negative)
USB_DP_DN2	9	I/O	USB High-speed differential transceiver (positive)
USB_DM_DN2	10	I/O	USB High-speed differential transceiver (negative)
PWRCTL2/BATEN2	35	I/O, PD	USB Port 2 Power On Control for Downstream Power/Battery Charging Enable. The pin is used for control of the downstream power switch for Port 2. This pin be left unconnected if power management is not implemented.
			In addition, the value of the pin is sampled at the de-assertion of reset to determine the value of the battery charging support for Port 2 as indicated in the Battery Charging Support register:
				0 = Battery charging not supported
				1 = Battery charging supported
OVERCUR2z	47	I, PU	USB Port 2 Over-Current Detection. This pin is typically connected to the over current output of the downstream port power switch for Port 2.
				0 = An over current event has occurred
				1 = An over current event has not occurred
			When GANGED power management is enabled, this pin or one of the other OVERCURz pins must be connected to the over current output of the power switch or circuit which detects the over current conditions. For the case when another OVERCURz pin is used, this pin can be left unconnected.
USB_SSTXP_DN3	19	O	USB SuperSpeed transmitter differential pair (positive)
USB_SSTXM_DN3	20	O	USB SuperSpeed transmitter differential pair (negative)
USB_SSRXP_DN3	22	I	USB SuperSpeed receiver differential pair (positive)
USB_SSRXM_DN3	23	I	USB SuperSpeed receiver differential pair (negative)
USB_DP_DN3	17	I/O	USB High-speed differential transceiver (positive)
USB_DM_DN3	18	I/O	USB High-speed differential transceiver (negative)
PWRCTL3/BATEN3	33	I/O, PD	USB Port 3 Power On Control for Downstream Power/Battery Charging Enable. The pin is used for control of the downstream power switch for Port 3. This pin be left unconnected if power management is not implemented.
			In addition, the value of the pin is sampled at the de-assertion of reset to determine the value of the battery charging support for Port 3 as indicated in the Battery Charging Support register:
				0 = Battery charging not supported
				1 = Battery charging supported
OVERCUR3z	44	I, PU	USB Port 3 Over-Current Detection. This pin is typically connected to the over current output of the downstream port power switch for Port 3.
				0 = An over current event has occurred
				1 = An over current event has not occurred
			When GANGED power management is enabled, this pin or one of the other OVERCURz pins must be connected to the over current output of the power switch or circuit which detects the over current conditions. For the case when another OVERCURz pin is used, this pin can be left unconnected.
USB_SSTXP_DN4	26	O	USB SuperSpeed transmitter differential pair (positive)
USB_SSTXM_DN4	27	O	USB SuperSpeed transmitter differential pair (negative)
USB_SSRXP_DN4	29	I	USB SuperSpeed receiver differential pair (positive)
USB_SSRXM_DN4	30	I	USB SuperSpeed receiver differential pair (negative)
USB_DP_DN4	24	I/O	USB High-speed differential transceiver (positive)
USB_DM_DN4	25	I/O	USB High-speed differential transceiver (negative)
PWRCTL4/BATEN4	32	I/O, PD	USB Port 4 Power On Control for Downstream Power/Battery Charging Enable. The pin is used for control of the downstream power switch for Port 4. This pin be left unconnected if power management is not implemented.
			In addition, the value of the pin is sampled at the de-assertion of reset to determine the value of the battery charging support for Port 4 as indicated in the Battery Charging Support register:
				0 = Battery charging not supported
				1 = Battery charging supported
OVERCUR4z	43	I, PU	USB Port 4 Over-Current Detection. This pin is typically connected to the over current output of the downstream port power switch for Port 4.
				0 = An over current event has occurred
				1 = An over current event has not occurred
			When GANGED power management is enabled, this pin or one of the other OVERCURz pins must be connected to the over current output of the power switch or circuit which detects the over current conditions. For the case when another OVERCURz pin is used, this pin can be left unconnected.
I²C/SMBUS I²C Signals
SCL/SMBCLK	38	I/O, PD	I²C clock/SMBus clock. Function of pin depends on the setting of the SMBUSz input.
				When SMBUSz = 1, this pin acts as the serial clock interface for an I²C EEPROM.
				When SMBUSz = 0, this pin acts as the serial clock interface for an SMBus host.
			Can be left unconnected if external interface not implemented.
SDA/SMBDAT	37	I/O, PD	I²C data/SMBus data. Function of pin depends on the setting of the SMBUSz input.
				When SMBUSz = 1, this pin acts as the serial data interface for an I²C EEPROM.
				When SMBUSz = 0, this pin acts as the serial data interface for an SMBus host.
			Can be left unconnected if external interface not implemented.
SMBUSz/SS_SUSPEND	39	I/O, PU	I²C/SMBus mode select/SuperSpeed USB Suspend Status. The value of the pin is sampled at the de-assertion of reset set I²C or SMBus mode as follows:
				1 = I²C Mode Selected
				0 = SMBus Mode Selected
			Can be left unconnected if external interface not implemented.
			After reset, this signal indicates the SuperSpeed USB Suspend status of the upstream port if enabled through the stsOutputEn bit in the Additional Feature Configuration register. When enabled, a value of 1 indicates the connection is suspended.
Test and Miscellaneous Signals
PWRCTL_POL	41	I/O, PU	Power Control Polarity.
			The value of the pin is sampled at the de-assertion of reset to set the polarity of PWRCTL[4:1].
				0 = PWRCTL polarity is active low
				1 = PWRCTL polarity is active high
BBEN/GANGED/HS_UP	42	I/O, PD	When configured for I2C mode, this pin functions as Billboard Enable. When high, the billboard device is enabled and presented to system. When low, the billboard device is disabled. If SMBus is selected, then Billboard enable is controlled by a register. If SMBus is selected and stsOutputEn bit is set, this pin will function as a HS_UP (upstream HS connection indicator). When enabled, a value of 1 indicates the upstream port is connected to a High-speed USB capable port. If SMBus is selected, the value of the pin is sampled at the de-assertion of reset to set the power switch and over current detection mode as follows: 0= Individual port power control supported. 1= Ganged port Power control supported. SMBus master can at a later time override the register.
BBbmConfigured0 /FULLAUTOz / FULLPWRMGMTz /SS_UP	40	I/O, PD	When configured for I2C mode, this pin along with BBbmConfigured1 directly controls the bmConfigurated field in the Billboard Capability descriptor. If SMBus is selected, then bmConfigured[0] field is determined by a register. If SMBus is selected and battery charginig is enabled on any port, the sampled state of this pin will set or clear the FullAutoEn bit in the Device Configuration Register 3. SMBus master can at a later time override the register. If SMBus is selected and battery charging is disabled, then the value of the pin is sampled at the de-assertion of reset to set the power switch control: SMBus master can at a later time override this function. 0 = Power Switching and over current inputs supported. 1= Power Switch and over current inputs not supported. If SMBus is selected and stsOutputEn bit is set, ths pin will function as a SS_UP (upstream SS connection indicator). When enabled, a value of 1 indicates the upstream port is connected to a SuperSpeed USB capable port.
BBbmConfigured1/AUTOENz/HS_SUSPEND	45	I/O, PD	When configured for I2C mode, this pin along with BBbmConfigured0 directly controls the bmConfigurated field in the Billboard Capability descriptor. If SMBus is selected, then bmConfigured[1] field is determined by a register. If SMBus is selected, the sampled value of this pin will set or clear the autoEnz bit in the Battery Charging Support Register. SMBus master can at a later time override the register. If SMBus is selected and stsOutputEn bit is set, this pin will function as a HS_SUSPEND (upstream HS suspend indicator). When enabled, a value of 1 indicates the connection is suspended.
TEST	49	I, PD	This pin is reserved for factory test. It is suggested to have this pin pulled down to ground on PCB.
Power and Ground Signals
VDD	5, 8, 13, 21, 28, 31, 51, 57	PWR	1.1-V power rail
VDD33	16, 34, 52, 63	PWR	3.3-V power rail
VSS (Thermal Pad)		PWR	Ground. Thermal pad must be connected to ground.
NC	60	—	No connect, leave floating