Table 41. Design Parameters

9.2.1.2.1 Upstream Port Implementation

The upstream of the TUSB8044 is connected to a USB Type-C captive cable. The system VBUS signal from the USB3 Type C plug is fed through a voltage divider. The purpose of the voltage divider is to make sure the system VBUS level meets TUSB8044 USB_VBUS input requirements. The voltage divider in this particular implementation will support up to 11.4V VBUS. If VBUS needs to be greater, then PD controller will need to directly control TUSB8044 USB_VBUS input. The USB-C plug has two pairs of USB3.1 differential pairs (RX1/TX1 and RX2/TX2). In this particular example, one pair of super speed signals (RX2 and TX2) from Type-C plug is connected to the DP Hub/Retimer/Redriver. The other pair of super speed signals (RX1 and TX2) is routed to the TUSB8044. The CC1 and VCONN signals from the Type-C plug is connected to the USB PD controller.

Figure 36. Upstream Port Implementation

9.2.1.2.2 Downstream Port 1 Implementation

The downstream port 1 of the TUSB8044 is connected to a USB Type-C receptacle. With BATEN1 pin pulled up, Battery Charge support is enabled for Port 1. If Battery Charge support is not needed, then pull-up resistor on BATEN1 should be uninstalled. A 1:2 MUX passive MUX is used to route the hub downstream port's super speed signals to the appropriate location on the USB Type-C receptacle. The MUX orientation is controlled by the PD controller through the SEL signal. A example 1:2 passive MUX that could be used is the Texas Instrument's HD3SS3212.

Figure 37. Downstream Port 1 Implementation

9.2.1.2.3 Downstream Port 2 Implementation

The downstream port 2 of the TUSB8044 is connected to a USB3 Type A connector. With BATEN2 pin pulled up, Battery Charge support is enabled for Port 2. If Battery Charge support is not needed, then pull-up resistor on BATEN2 should be uninstalled. For ferrite bead used on the VBUS connection, a lower resistance is recommended due to noticeable IR drop during high current charging modes. The isolation between the Type-A connectors shield ground and signal ground pins is not required. Some applications may have better ESD/EMI performance when the grounds are shorted together.

Figure 38. Downstream Port 2 Implementation

9.2.1.2.4 Downstream Port 3 Implementation

The downstream port3 of the TUSB8044 is connected to a USB3 Type A connector. With BATEN3 pin pulled up, Battery Charge support is enabled for Port 3. If Battery Charge support is not needed, then pull-up resistor on BATEN3 should be uninstalled. For ferrite bead used on the VBUS connection, a lower resistance is recommended due to noticeable IR drop during high current charging modes. The isolation between the Type-A connectors shield ground and signal ground pins is not required. Some applications may have better ESD/EMI performance when the grounds are shorted together.

Figure 39. Downstream Port 3 Implementation

9.2.1.2.5 Downstream Port 4 Implementation

The downstream port 4 of the TUSB8044 is connected to a USB3 Type A connector. With BATEN4 pin pulled up, Battery Charge support is enabled for Port 4. If Battery Charge support is not needed, then pull-up resistor on BATEN4 should be uninstalled. For ferrite bead used on the VBUS connection, a lower resistance is recommended due to noticeable IR drop during high current charging modes. The isolation between the Type-A connectors shield ground and signal ground pins is not required. Some applications may have better ESD/EMI performance when the grounds are shorted together.

Figure 40. Downstream Port 4 Implementation

9.2.1.2.6 VBUS Power Switch Implementation

This particular example uses the Texas Instruments TPS2561 Dual Channel Precision Adjustable Current-Limited power switch. For details on this power switch or other power switches available from Texas Instruments, refer to the Texas Instruments website.

Figure 41. VBUS Power Switch Implementation

9.2.1.2.7 PD Controller and EEPROM Implementation

In this specfic application, PD controller monitors and controls the CC line and the VBUS on both the upstream Type-C port and the downstream Type-C port. It also utilizes BBconfigure0 and BBconfigure1 to set up the billboard function of TUSB8044 and custom billboard information is stored in the EEPROM. Moreover, the controller uses the GPIOs to control the super speed MUX.

The TUSB8044 loads the 256 bytes plus the billboard strings from an external EEPROM. The billboard string starts at address 0x100 and ends at address 0x2DF for a total of 480 bytes. A minimum of 5.888Kbit EEPROM is recommended. EEPROMs do not come in this size so an 8Kbit EEPROM (10-bit addressing) is recommended. For example, an Atmel AT24C08A could be used.

Figure 42. PD Controller and EEPROM Implementation

9.2.1.2.8 DisplayPort Implementation

The DisplayPort interface can be implemented with a DisplayPort MST Hub or a DisplayPort redriver/retimer. The main channels and the AUX channels are connected to the DP receptacle after the HUB.

Figure 43. DisplayPort Implementation

9.2.1.2.9 Clock, Reset, and Misc

The PWRCTL_POL is left unconnected which results in active high power enable (PWRCTL1, PWRCTL2, PWRCTL3, and PWRCTL4) for a USB VBUS power switch. SMBUSz pin is also left unconnected which will select I2C mode. Both PWRCTL_POL and SMBUSz pins have internal pull-ups. The 1 µF capacitor on the GRSTN pin can only be used if the VDD11 supply is stable before the VDD33 supply. The depending on the supply ramp of the two supplies the capacitor size may have to be adjusted.

Figure 44. Clock, Reset, and Misc

9.2.1.2.10 TUSB8044 Power Implementation

Figure 45. TUSB8044 Power Implementation