JAJSPY8E january   2007  – march 2023 TXB0101

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specification
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements, VCCA = 1.2 V
    7. 6.7  Timing Requirements, VCCA = 1.5 V ± 0.1 V
    8. 6.8  Timing Requirements, VCCA = 1.8 V ± 0.15 V
    9. 6.9  Timing Requirements, VCCA = 2.5 V ± 0.2 V
    10. 6.10 Timing Requirements, VCCA = 3.3 V ± 0.3 V
    11. 6.11 Switching Characteristics, VCCA = 1.2 V
    12. 6.12 Switching Characteristics, VCCA = 1.5 V ± 0.1 V
    13. 6.13 Switching Characteristics, VCCA = 1.8 V ± 0.15 V
    14. 6.14 Switching Characteristics, VCCA = 2.5 V ± 0.2 V
    15. 6.15 Switching Characteristics, VCCA = 3.3 V ± 0.3 V
    16. 6.16 Operating Characteristics
    17. 6.17 Typical Characteristics
      1.      Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Architecture
      2. 7.3.2 Power Up
      3. 7.3.3 Enable and Disable
      4. 7.3.4 Pullup or Pulldown Resistors on I/O Lines
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Input Driver Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.1 Overview

The TXB0101 device is a 1-bit directionless level-shifting and voltage translator specifically designed for translating logic voltage levels. The A port accepts I/O voltages ranging from 1.2 V to 3.6 V, while the B port is able to accept I/O voltages from 1.65 V to 5.5 V. The device is a buffered architecture with edge rate accelerators (one-shots) to improve the overall data rate. This device can only translate push-pull CMOS logic outputs. If for open-drain signal translation, see TI TXS010X products.