JAJSQ37
july 2023
TXV0106-Q1
ADVANCE INFORMATION
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics, VCCA = 1.8 ± 0.15 V
6.7
Switching Characteristics, VCCA = 2.5 ± 0.2 V
6.8
Switching Characteristics, VCCA = 3.3 ± 0.3 V
7
Parameter Measurement Information
7.1
Load Circuit and Voltage Waveforms
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Balanced High-Drive CMOS Push-Pull Outputs
8.3.2
Partial Power Down (Ioff)
8.3.3
VCC Isolation and VCC Disconnect (Ioff-float)
8.3.4
Over-Voltage Tolerant Inputs
8.3.5
Negative Clamping Diodes
8.3.6
Fully Configurable Dual-Rail Design
8.3.7
Supports High-Speed Translation
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
ドキュメントの更新通知を受け取る方法
10.3
サポート・リソース
10.4
Trademarks
10.5
静電気放電に関する注意事項
10.6
用語集
11
Mechanical, Packaging, and Orderable Information
11.1
Tape and Reel Information
11.2
Mechanical Data
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
BQB|16
MPQF539A
サーマルパッド・メカニカル・データ
BQB|16
PPTD365
発注情報
jajsq37_oa
8.4
Device Functional Modes
Table 8-1 Function Table
CONTROL INPUTS
(1)
PORT STATUS
OPERATION
OE
A PORT
B PORT
L
Input (Hi-Z)
Output (Enabled)
A data to B bus
H
Input (Hi-Z)
Input (Hi-Z)
Isolation
(1)
Input circuits of the data I/Os are always active and should be kept at a valid logic level.