JAJSSP7U June   1976  – May 2024

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics: UA78M33 (Both Legacy and New Chip)
    6. 5.6  Electrical Characteristics: UA78M05 (Both Legacy and New Chip)
    7. 5.7  Electrical Characteristics: UA78M06C (Legacy Chip Only)
    8. 5.8  Electrical Characteristics: UA78M08C (Legacy Chip Only)
    9. 5.9  Electrical Characteristics: UA78M09 (Legacy Chip Only)
    10. 5.10 Electrical Characteristics: UA78M10 (Legacy Chip Only)
    11. 5.11 Electrical Characteristics: UA78M12 (Legacy Chip Only)
    12. 5.12 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Current Limit
      2. 6.3.2 Dropout Voltage (VDO)
      3. 6.3.3 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Requirements
        2. 7.2.2.2 Power Dissipation (PD)
        3. 7.2.2.3 Estimating Junction Temperature
        4. 7.2.2.4 External Capacitor Requirements
        5. 7.2.2.5 Overload Recovery
        6. 7.2.2.6 Reverse Current
        7. 7.2.2.7 Polarity Reversal Protection
      3. 7.2.3 Application Curves
    3. 7.3 System Examples
      1. 7.3.1 Positive Regulator in Negative Configuration
      2. 7.3.2 Current Limiter Circuit
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Module
      2. 8.1.2 Device Nomenclature
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • KVU|3
  • DCY|4
  • KCS|3
サーマルパッド・メカニカル・データ
発注情報

5.12 Typical Characteristics

uA78M Output Voltage vs Temperature (New Chip)
VOUT = 5V, VIN = 8V
Figure 5-1 Output Voltage vs Temperature (New Chip)
uA78M Line Regulation at TJ = 25°C (New Chip)
VOUT = 5V, IOUT = 350mA
Figure 5-3 Line Regulation at TJ = 25°C (New Chip)
uA78M Bias Current vs Temperature (New Chip)
VOUT = 5V, VIN = 10V
Figure 5-5 Bias Current vs Temperature (New Chip)
uA78M Output Voltage vs ICL (New Chip)
VO = 3.3V
Figure 5-7 Output Voltage vs ICL (New Chip)
uA78M PSRR vs Frequency and IO (Legacy Chip)
VI = 8V to 18V, TJ = 25°C
Figure 5-9 PSRR vs Frequency and IO (Legacy Chip)
uA78M Noise vs Frequency (New Chip)
VIN = 10V, VOUT = 5V, IOUT = 100mA, COUT = 0.1μF
Figure 5-11 Noise vs Frequency (New Chip)
uA78M Load Regulation at TJ = 25°C (New Chip)
VOUT = 5V, VIN = 8V
Figure 5-2 Load Regulation at TJ = 25°C (New Chip)
uA78M Bias Current vs Input Voltage at TJ = 25°C (New Chip)
 
Figure 5-4 Bias Current vs Input Voltage at TJ = 25°C
(New Chip)
uA78M ICL vs Input Voltage (New Chip)
VO = 0V
Figure 5-6 ICL vs Input Voltage (New Chip)
uA78M Output Voltage vs ICL (New Chip)
VO = 5V
Figure 5-8 Output Voltage vs ICL (New Chip)
uA78M PSRR vs Frequency and IO (New Chip)
VI = 13V, VO = 5V
Figure 5-10 PSRR vs Frequency and IO (New Chip)