SLUS557G March   2003  – December 2016 UC28023 , UC28025

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Control Methods and Test Circuits
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Error Amplifier
      2. 8.3.2 Synchronization
      3. 8.3.3 Constant Volt-Second Clamp Circuit
      4. 8.3.4 Outputs
      5. 8.3.5 Open-Loop Laboratory Test Fixture
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Timing Resistor and Capacitor Selection
        2. 9.2.2.2 Turns Ratio Selection
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Rectifier Diode Selection
        5. 9.2.2.5 Snubber Components Selection
        6. 9.2.2.6 VCC and VC Capacitor Selection
        7. 9.2.2.7 Output Capacitor Selection
        8. 9.2.2.8 Input Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • N|16
  • DW|16
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • Peak Current Mode, Average Current Mode, or Voltage Mode (With FeedForward) Control Methods
  • Practical Operation Up to 1 MHz
  • 50-ns Propagation Delay to Output
  • ±1.5-A Peak Totem Pole Outputs
  • 9-V to 30-V Nominal Operational Voltage
  • Wide Bandwidth Error Amplifier
  • Fully Latched Logic With Double Pulse Suppression
  • Pulse-by-Pulse Current Limiting
  • Programmable Maximum Duty Cycle Control
  • Undervoltage Lockout With Hysteresis
  • Trimmed 5.1-V Reference With UVLO
  • Same Functionality as UC3823 and UC3825

2 Applications

  • Off-Line and DC-DC Power Supplies
  • Converters Using Voltage Mode, Peak Current Mode, or Average Current Mode Control Methods
  • Single-Ended or Two-Switch Topology Designs

3 Description

The UC28023 and UC28025 are fixed-frequency PWM controllers optimized for high-frequency switched-mode power-supply applications. The UC28023 is a single output PWM for single-ended topologies while the UC28025 offers dual alternating outputs for double-ended and full bridge topologies.

Targeted for cost-effective solutions with minimal external components. UC2802x devices include an oscillator, a temperature compensated reference, a wide bandwidth error amplifier, a high-speed current-sense comparator, and high-current, active-high, totem-pole outputs to directly drive external MOSFETs.

Protection circuitry includes a current limit comparator with a 1-V threshold, a TTL compatible shutdown port, and a soft-start pin which doubles as a maximum duty-cycle clamp. The logic is fully latched to provide jitter-free operation and prohibit multiple pulses at an output. An undervoltage lockout section with 800 mV of hysteresis assures low start-up current. During undervoltage lockout, the outputs are high impedance. Propagation delays through the comparators and logic circuitry have been minimized while maximizing bandwidth and slew rate of the error amplifier.

Devices are available in the industrial temperature range of –40°C to 105°C. Package offerings are
16-pin SOIC (DW), or 16-pin PDIP (N) packages.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
UC2802x SOIC (16) 10.30 mm × 7.50 mm
PDIP (16) 19.30 mm × 6.35 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Schematic

UC28023 UC28025 typ_app_1_5_MHz_48_V_slus557.gif