SLUS557G March   2003  – December 2016 UC28023 , UC28025

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Control Methods and Test Circuits
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Error Amplifier
      2. 8.3.2 Synchronization
      3. 8.3.3 Constant Volt-Second Clamp Circuit
      4. 8.3.4 Outputs
      5. 8.3.5 Open-Loop Laboratory Test Fixture
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Timing Resistor and Capacitor Selection
        2. 9.2.2.2 Turns Ratio Selection
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Rectifier Diode Selection
        5. 9.2.2.5 Snubber Components Selection
        6. 9.2.2.6 VCC and VC Capacitor Selection
        7. 9.2.2.7 Output Capacitor Selection
        8. 9.2.2.8 Input Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • N|16
  • DW|16
サーマルパッド・メカニカル・データ
発注情報

Detailed Description

Overview

The UC28023 and UC28025 (UC2802x) are fixed-frequency PWM controllers optimized for high-frequency switched-mode power-supply applications. Targeted for cost-effective solutions with minimal external components. UC2802x devices include an oscillator, a temperature-compensated reference, a wide band width error amplifier, a high-speed current-sense comparator, and high-current active-high totem-pole outputs to directly drive external MOSFETs.

Protection circuitry includes a current limit comparator with a 1-V threshold, a TTL compatible shutdown port, and a soft-start pin which doubles as a maximum duty cycle clamp. The logic is fully latched to provide jitter free operation and prohibit multiple pulses at an output. An undervoltage lockout section with 800 mV of hysteresis assures low start-up current. During undervoltage lockout, the outputs are high impedance. Propagation delays through the comparators and logic circuitry have been minimized while maximizing bandwidth and slew rate of the error amplifier.

Functional Block Diagram

UC28023 UC28025 fbd_slus557.gif

Feature Description

Error Amplifier

Figure 11 shows a simplified schematic of the UC2802x error amplifier and Figure 2 and Figure 3 show its characteristics.

UC28023 UC28025 simplified_error_amp_slus557.gif Figure 11. Simplified Error Amplifier Schematic

Synchronization

Figure 12 shows a generalized synchronization. Figure 13 shows a synchronized operation of two units in close proximity.

UC28023 UC28025 generalized_sync_slus557.gif Figure 12. Generalized Synchronization
UC28023 UC28025 sync_two_unite_close_proximity_slus557.gif Figure 13. Synchronization of Two Units in Close Proximity

Constant Volt-Second Clamp Circuit

The circuit for the UC28023 shown in Figure 14 describes achievement a constant volt-second product clamp over varying input voltages. The ramp generator components, RT and CR are chosen so that the ramp at Pin 9 (ILIM/SD) crosses the 1-V threshold at the same time the desired maximum volt-second product is reached. The delay through the functional inverter block must be such that the ramp capacitor can be completely discharged during the minimum deadtime.

UC28023 UC28025 achieving_constant_volt_second_slus557.gif Figure 14. Achieving Constant Volt-Second Product Clamp With the UC28023

The circuit for the UC28025 shown in Figure 15 describes achievement a constant volt-second product clamp over varying input voltages. The ramp generator components, RT and CR are chosen so that the ramp at Pin 9 (ILIM/SD) crosses the 1-V threshold at the same time the desired maximum volt-second product is reached. The delay through the functional inverter block must be such that the ramp capacitor can be completely discharged during the minimum deadtime.

UC28023 UC28025 achieving_constant_volt_second_with_UC28025_slus557.gif Figure 15. Achieving Constant Volt-Second Product Clamp With the UC28025

Outputs

UC28023 has one output and UC28025 has dual alternating outputs.

UC28023 UC28025 simplified_schematic_slus557.gif Figure 16. Simplified Schematic

Open-Loop Laboratory Test Fixture

The following test fixture is useful for exercising many of the UC28025’s functions and measuring their specifications. As with any wideband circuit, careful ground and bypass procedures must be followed. TI highly recommends using a ground plane

UC28023 UC28025 laboratory_test_fixture_slus557.gif Figure 17. Laboratory Test Fixture

Device Functional Modes

There are no functional modes for this device.