JAJSR38 august 2023 UCC15240-Q1
PRODUCTION DATA
The UCC15240-Q1 device creates an isolated output VDD-VEE as its main output. It also creates a second output COM-VEE, using VDD-VEE as its power source. Because both outputs are isolated from the input, and sharing VEE as the common reference point, the UCC15240-Q1 outputs can be configured as dual-output two-positive, dual-output two-negative, or dual-output one-positive and one-negative, as shown in Figure 12-6.
(a) Dual-output, two-positive | (b) Dual-output, two-negative |
(c) Dual-output, one-positive, one-negative |
When the module is configured as dual-positive or dual-negative outputs, the RLIM resistor is a true current limiting resistor. Set up the RLIM resistor value as the maximum load current needed for VOUT2, using Equation 15. IVOUT2_max is the maximum load current for VOUT2 output.
RLIM_INT is the internal switch resistance value of 30 Ω typical.
For isolated gate driver applications, one positive and one negative outputs are needed. In this case, VDD-VEE is the total output voltage, and the middle point becomes the reference point. Because the total voltage between VDD and VEE is always regulated through the FBVDD feedback, the RLIM pin only must regulate the middle point voltage so that it can give the correct positive and negative voltages. The RLIM control is achieved through FBVEE pin as described in COM-VEE Voltage Regulation.
Based on
UCC15240-Q1 車載用 2.5W、24V VIN、24V VOUT、高密度、
3kVRMS 超、絶縁型 DC/DC モジュールPower Stage OperationOutput Voltage Soft Start ENA and PG
Capacitor SelectionSingle RLIM Resistor SelectionRDR Circuit Component SelectionFeedback Resistors Selection, when selecting
the output capacitor ratio proportional to the voltage ratio, the capacitors form a
voltage divider. The middle point voltage must naturally give the correct positive
and negative voltages. At the same time, for the gate driver circuit, the gate
charge pulled out from the positive rail capacitor during turn-on is fed back to the
negative rail capacitor during turn-off, the two output rail load must always be
balanced. However, due to the gate driver circuit quiescent current unbalancing, and
the two-rail capacitance tolerances, the middle point voltage can move away with
time. The RLIM pin provides an opposite current to keep the middle point voltage at
the correct level.
As illustrated in Figure 12-7 (a), without considering the gate charge, the gate driver circuit quiescent current loads the positive rail and negative rail differently. The net current shows up as a DC offset current to the middle point.
As illustrated in Figure 12-7 (b), every time the gate driver circuit turns-on the main power switch, it pulls the charge out of the positive and negative rail output capacitors. When the module power stage provides energy to the secondary side, refreshing those capacitors, the same charge is fed into both capacitors. If the capacitor values are perfect, the voltage rise in the capacitors will be proportional. The positive and negative voltages would not change. However, due to the capacitor tolerances, the capacitor values are not perfectly matched. The voltages will rise at different ratios with the smaller capacitor rising faster. Over time, the middle point voltage, COM, would pull to a different value. A load across one of the capacitors will pull towards a voltage imbalance. The RLIM function counteract the voltage imbalance and bring the COM voltage back into regulation.
(a) Load current unbalancing | (b) Capacitance unbalancing |
The RLIM resistor is chosen to provide enough current for the load using the following 3 equations, whichever has lowest value.
∆ICOM_SOURCE=ICOM-VEE-IVDD-COM, when ICOM-VEE>IVDD-COM. Otherwise, ∆ICOM_SOURCE=0A.
where ∆ICOM_SINK=IVDD-COM-ICOM-VEE, when ICOM-VEE<IVDD-COM. Otherwise, ∆ICOM_SINK=0A.
RLIM value determines response time of (COM – VEE) regulation. Too low an RLIM value can cause oscillation and can overload (VDD – VEE). Too high an RLIM value can give offset errors, due to slow response. If RLIM is greater than above calculations, then there is not enough current available to replenish the charge to the output capacitors, causing a charge imbalance where the voltage is not able to maintain regulation, and eventually exceeds the OVP or UVP FAULT thresholds and shutting down the device for protection. Choose RLIM value to be close but smaller than the smallest value of the three calculated results.
The power loss of RLIM can be derived as