SLUSDU7A
March 2020 – August 2024
UCC21320-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings (Automotive)
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Power Ratings
5.6
Insulation Specifications
5.7
Safety Limiting Values
5.8
Electrical Characteristics
5.9
Timing Requirements
5.10
Switching Characteristics
5.11
Insulation Characteristics Curves
5.12
Typical Characteristics
6
Parameter Measurement Information
6.1
Propagation Delay and Pulse Width Distortion
6.2
Rising and Falling Time
6.3
Input and Disable Response Time
6.4
Programable Dead Time
6.5
Power-up UVLO Delay to OUTPUT
6.6
CMTI Testing
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
VDD, VCCI, and Under Voltage Lock Out (UVLO)
7.3.2
Input and Output Logic Table
7.3.3
Input Stage
7.3.4
Output Stage
7.3.5
Diode Structure in the UCC21320 -Q1
7.4
Device Functional Modes
7.4.1
Disable Pin
7.4.2
Programmable Dead Time (DT) Pin
7.4.2.1
Tying the DT Pin to VCC
7.4.2.2
DT Pin Connected to a Programming Resistor between DT and GND Pins
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Designing INA/INB Input Filter
8.2.2.2
Select External Bootstrap Diode and its Series Resistor
8.2.2.3
Gate Driver Output Resistor
8.2.2.4
Gate to Source Resistor Selection
8.2.2.5
Estimate Gate Driver Power Loss
8.2.2.6
Estimating Junction Temperature
8.2.2.7
Selecting VCCI, VDDA/B Capacitor
8.2.2.7.1
Selecting a VCCI Capacitor
8.2.2.7.2
Selecting a VDDA (Bootstrap) Capacitor
8.2.2.7.3
Select a VDDB Capacitor
8.2.2.8
Dead Time Setting Guidelines
8.2.2.9
Application Circuits with Output Stage Negative Bias
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Revision History
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
DWK|14
サーマルパッド・メカニカル・データ
発注情報
slusdu7a_oa
slusdu7a_pm
1
Features
4A peak source, 6A peak sink output
3V to 18V input VCCI range to interface with both digital and analog controllers
Up to 25V VDD output drive supply
Switching parameters:
33ns typical propagation delay
20ns minimum pulse width
6
ns maximum pulse-width distortion
Common-mode transient immunity (CMTI) greater than 125V/ns
Universal: dual low-side, dual high-side or half-bridge driver
Programmable overlap and dead time
Wide body SOIC-14 (DWK) package
3.3mm spacing between driver channels
Junction temperature range –40 to +150°C
TTL and CMOS compatible inputs
Fast disable for power sequencing
Qualified for automotive applications
AEC-Q100 qualified with the following results
Device temperature grade 1