JAJSLR1B April   2022  – June 2024 UCC21717-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety Limiting Values
    8. 5.8  Electrical Characteristics
    9. 5.9  Switching Characteristics
    10. 5.10 Insulation Characteristics Curves
    11. 5.11 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Propagation Delay
      1. 6.1.1 Non-Inverting and Inverting Propagation Delay
    2. 6.2 Input Deglitch Filter
    3. 6.3 Active Miller Clamp
      1. 6.3.1 Internal Active Miller Clamp
    4. 6.4 Undervoltage Lockout (UVLO)
      1. 6.4.1 VCC UVLO
      2. 6.4.2 VDD UVLO
    5. 6.5 Overcurrent (OC) Protection
      1. 6.5.1 OC Protection with Soft Turn-OFF
    6. 6.6 Soft Turn-Off Triggered by RST/EN
      1. 6.6.1 Soft Turn-Off Triggered by RST/EN
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power Supply
      2. 7.3.2  Driver Stage
      3. 7.3.3  VCC and VDD Undervoltage Lockout (UVLO)
      4. 7.3.4  Active Pulldown
      5. 7.3.5  Short Circuit Clamping
      6. 7.3.6  Internal Active Miller Clamp
      7. 7.3.7  Overcurrent and Short Circuit Protection
      8. 7.3.8  Soft Turn-Off
      9. 7.3.9  Fault (FLT), Reset and Enable (RST/EN)
      10. 7.3.10 Isolated Analog to PWM Signal Function
    4. 7.4 Device Functional Modes
  9. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Filters for IN+, IN-, and RST/EN
        2. 8.2.2.2 PWM Interlock of IN+ and IN-
        3. 8.2.2.3 FLT, RDY, and RST/EN Pin Circuitry
        4. 8.2.2.4 RST/EN Pin Control
        5. 8.2.2.5 Turn-On and Turn-Off Gate Resistors
        6. 8.2.2.6 Overcurrent and Short Circuit Protection
          1. 8.2.2.6.1 Protection Based on Power Modules with Integrated SenseFET
          2. 8.2.2.6.2 Protection Based on Desaturation Circuit
          3. 8.2.2.6.3 Protection Based on Shunt Resistor in Power Loop
        7. 8.2.2.7 Isolated Analog Signal Sensing
          1. 8.2.2.7.1 Isolated Temperature Sensing
          2. 8.2.2.7.2 Isolated DC Bus Voltage Sensing
        8. 8.2.2.8 Higher Output Current Using an External Current Buffer
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 サード・パーティ製品に関する免責事項
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.11 Typical Characteristics

UCC21717-Q1 Output High Drive Current vs. Temperature
Figure 5-4 Output High Drive Current vs. Temperature
UCC21717-Q1 IVCCQ Supply Current vs. Temperature
IN+ = High IN- = Low
Figure 5-6 IVCCQ Supply Current vs. Temperature
UCC21717-Q1 IVCCQ Supply Current vs. Input Frequency
Figure 5-8 IVCCQ Supply Current vs. Input Frequency
UCC21717-Q1 IVDDQ Supply Current vs. Temperature
IN+ = Low IN- = Low
Figure 5-10 IVDDQ Supply Current vs. Temperature
UCC21717-Q1 VDD UVLO vs. Temperature
Figure 5-12 VDD UVLO vs. Temperature
UCC21717-Q1 Propagation Delay tPDLH vs. Temperature
VCC = 3.3V VDD=18V CL = 100pF
RON = 0Ω ROFF = 0Ω
Figure 5-14 Propagation Delay tPDLH vs. Temperature
UCC21717-Q1 tr Rise Time vs. Temperature
VCC = 3.3V VDD=18V CL = 10nF
RON = 0Ω ROFF = 0Ω
Figure 5-16 tr Rise Time vs. Temperature
UCC21717-Q1 VOUTPD Output Active Pulldown Voltage vs. Temperature
Figure 5-18 VOUTPD Output Active Pulldown Voltage vs. Temperature
UCC21717-Q1 VCLP-OUT(L) Short Circuit Clamping Voltage vs. Temperature
Figure 5-20 VCLP-OUT(L) Short Circuit Clamping Voltage vs. Temperature
UCC21717-Q1 ICLMPI Miller Clamp Sink Current vs. Temperature
Figure 5-22 ICLMPI Miller Clamp Sink Current vs. Temperature
UCC21717-Q1 tOCOFF OC Propagation Delay vs. Temperature
Figure 5-24 tOCOFF OC Propagation Delay vs. Temperature
UCC21717-Q1 tOCFLT OC to FLT Low Delay Time vs. Temperature
Figure 5-26 tOCFLT OC to FLT Low Delay Time vs. Temperature
UCC21717-Q1 Output Low Driver Current vs. Temperature
Figure 5-5 Output Low Driver Current vs. Temperature
UCC21717-Q1 IVCCQ Supply Current vs. Temperature
IN+ = Low IN- = Low
Figure 5-7 IVCCQ Supply Current vs. Temperature
UCC21717-Q1 IVDDQ Supply Current vs. Temperature
IN+ = High IN- = Low
Figure 5-9 IVDDQ Supply Current vs. Temperature
UCC21717-Q1 IVDDQ Supply Current vs. Input Frequency
Figure 5-11 IVDDQ Supply Current vs. Input Frequency
UCC21717-Q1 VCC UVLO vs. Temperature
Figure 5-13 VCC UVLO vs. Temperature
UCC21717-Q1 Propagation Delay tPDHL vs. Temperature
VCC = 3.3V VDD=18V CL = 100pF
RON = 0Ω ROFF = 0Ω
Figure 5-15 Propagation Delay tPDHL vs. Temperature
UCC21717-Q1 tf Fall Time vs. Temperature
VCC = 3.3V VDD=18V CL = 10nF
RON = 0Ω ROFF = 0Ω
Figure 5-17 tf Fall Time vs. Temperature
UCC21717-Q1 VCLP-OUT(H) Short Circuit Clamping Voltage vs. Temperature
Figure 5-19 VCLP-OUT(H) Short Circuit Clamping Voltage vs. Temperature
UCC21717-Q1 VCLMPTH Miller Clamp Threshold Voltage vs. Temperature
Figure 5-21 VCLMPTH Miller Clamp Threshold Voltage vs. Temperature
UCC21717-Q1 tDCLMPI Miller Clamp ON Delay Time vs. Temperature
Figure 5-23 tDCLMPI Miller Clamp ON Delay Time vs. Temperature
UCC21717-Q1 VOCTH OC Detection Threshold vs. Temperature
Figure 5-25 VOCTH OC Detection Threshold vs. Temperature