JAJSLH8A
August 2020 – March 2021
UCC23511-Q1
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Function
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Ratings
6.6
Insulation Specifications
6.7
Safety-Related Certifications
6.8
Safety Limiting Values
6.9
Electrical Characteristics
6.10
Switching Characteristics
6.11
Insulation Characteristics Curves
6.12
Typical Characteristics
7
Parameter Measurement Information
7.1
Propagation Delay, rise time and fall time
7.2
IOH and IOL testing
7.3
CMTI Testing
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Power Supply
8.3.2
Input Stage
8.3.3
Output Stage
8.3.4
Protection Features
8.3.4.1
Undervoltage Lockout (UVLO)
8.3.4.2
Active Pulldown
8.3.4.3
Short-Circuit Clamping
9
Device Functional Modes
9.1
ESD Structure
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Selecting the Input Resistor
10.2.2.2
Gate Driver Output Resistor
10.2.2.3
Estimate Gate-Driver Power Loss
10.2.2.4
Estimating Junction Temperature
10.2.2.5
Selecting VCC Capacitor
10.2.3
Application Performance Plots
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
12.3
PCB Material
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DWY|6
MPSS109
サーマルパッド・メカニカル・データ
発注情報
jajslh8a_oa
10.2.3
Application Performance Plots
Figure 10-7
1-A Load Performace Data