JAJSEQ5A August   2017  – February 2018 UCC24612

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      ハイサイドSRによるフライバック
      2.      ローサイドSRによるフライバック
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Management
      2. 7.3.2 Synchronous Rectifier Control
      3. 7.3.3 Adaptive Blanking Time
        1. 7.3.3.1 Turn-On Blanking Timer (Minimum On Time)
        2. 7.3.3.2 Turn-Off Blanking Timer
        3. 7.3.3.3 SR Turn-on Re-arm
      4. 7.3.4 Gate Voltage Clamping
      5. 7.3.5 Standby Mode
    4. 7.4 Device Functional Modes
      1. 7.4.1 UVLO Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Run Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 SR MOSFET Selection
        2. 8.2.2.2 Bypass Capacitor Selection
        3. 8.2.2.3 Snubber design
        4. 8.2.2.4 High-Side Operation
      3. 8.2.3 Application Curves
        1. 8.2.3.1 Steady State Testing Low-Side Configuration
        2. 8.2.3.2 Steady State Testing High-Side Configuration
  9. 9 Power Supply Recommendations
  10. 10PCB Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 コミュニティ・リソース
    2. 11.2 商標
    3. 11.3 静電気放電に関する注意事項
    4. 11.4 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Timing Requirements

At VDD = 12 VDC, CVG = 0 pF, CREG = 2.2 µF, −40°C ≤ TJ = TA ≤ +125°C, all voltages are with respect to VS, and currents are positive into and negative out of the specified terminal, unless otherwise noted. Typical values are at TJ = +25°C.
TEST CONDITIONS MIN NOM MAX UNIT
MOSFET VOLTAGE SENSING
tdVGON Gate turn-on propagation delay VD transitions from 4.7 V to –0.3 V in 5 ns, UCC24612-1, TJ = 25°C, see curve for more information 40 80 120 ns
VD transitions from 4.7 V to –0.3 V in 5 ns, UCC24612-2, TJ = 25°C, see curve for more information 120 170 225
tdVGOFF Gate turn-off propagation delay VD moves from -0.3 V to 4.7 V in 5 ns 16 35 ns
MINIMUM ON-TIME
tON(min) Minimum SR conduction time UCC24612 -1 245 375 475 ns
UCC24612 -2 350 540 670 ns
Adaptive MINIMUM OFF-TIME
tOFF_ABSMIN Absolute minimum SR off-time UCC24612-1 200 400 595 ns
UCC24612-2 160 360 545
tOFF_MAX Maximum SR off-blanking time 2.65 3.68 4.65 µs
GATE DRIVER
tr_VG VG rise time 10% to 90%, CVG = 6.8 nF 10 32 65 ns
tf_VG VG fall time, 90% to 10%, CVG = 6.8 nF 5 16 35 ns
LIGHTLOAD / STANDBY
tSTBY_DET Standby mode detection time 3 4.5 6 ms
fSLEEP Average frequency entering standby mode 8 12 16 kHz
fWAKE Average frequency coming out of standby mode 10 15 20 kHz
fSTB_HYS Average frequency hysteresis for standby mode 2 3 4 kHz
PROTECTION
TTSD Thermal shut-down threshold 130(1) 165 ºC
THYS Thermal shut-down recovery hysteresis 15 ºC
(1) Specified by design