JAJSR32A june 2023 – august 2023 UCC27311A-Q1
ADVANCE INFORMATION
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The UCC27311A-Q1 is a high-voltage gate driver designed to drive both the high-side and the low-side N-channel MOSFETs in a synchronous buck or a half-bridge configurations. The two outputs are independently controlled with two TTL-compatible input signals. The device can also work with CMOS type control signals at its inputs as long as the signals meet the turn-on and turn-off threshold specifications of the device. The floating high-side driver is capable of operating with an HB voltage up to 115 V with respect to VSS. A 120-V bootstrap diode is integrated in the UCC27311A-Q1 device to charge the high-side gate drive bootstrap capacitor. A robust level shifter operates at high speed while consuming low power and provides clean level transitions from the control logic to the high-side gate driver. Undervoltage lockout (UVLO) is provided on both the low-side and the high-side power rails. EN pin is provided (in DRC packaged parts) to enable or disable the driver.
In the UCC27311A-Q1 automotive device, the high side and low side have seperate inputs that allow maximum flexibility of input control signals in the application. The boot diode for the high-side driver bias supply is internal to the UCC27311A-Q1.The high-side driver is referenced to the switch node (HS), which is typically the source pin of the high-side MOSFET and drain pin of the low-side MOSFET. The low-side driver is referenced to VSS, which is typically ground. The UCC27311A-Q1 functions are divided into the input stages, UVLO protection, level shift, boot diode, and output driver stages.
FEATURE | BENEFIT |
---|---|
+3.7-A/–4.5-A peak source and sink currents | High peak current ideal for driving large power MOSFETs with minimal power loss (fast-drive capability at Miller plateau) |
Input pins (HI and LI) can directly handle –10 VDC up to 20 VDC | Increased robustness and ability to handle undershoot and overshoot can interface directly to gate-drive transformers without having to use rectification diodes. |
120-V internal boot diode | Provides voltage margin to meet telecom 100-V surge requirements |
Switch node (HS pin) able to handle –18 V maximum for 100 ns | Allows the high-side channel to have extra protection from inherent negative voltages caused by parasitic inductance and stray capacitance |
Robust ESD circuitry to handle voltage spikes | Excellent immunity to large dV/dT conditions |
16-ns/20-ns propagation delays with 7.2-ns rise time and 5.5-ns fall time | Best-in-class switching characteristics and extremely low-pulse transmission distortion |
Enable/disable functionality | Offers additional control over the driver for different system states (such as powerup sequencing) and a low quiescent current consumption when disabled |
4-ns (typical) delay matching between channels | Avoids transformer volt-second offset in bridge |
Symmetrical UVLO circuit | Ensures high-side and low-side shut down at the same time |
TTL optimized thresholds with increased hysteresis | Complementary to analog or digital PWM controllers; increased hysteresis offers added noise immunity |