SLUSAY4D March   2012  – December 2014 UCC27516 , UCC27517

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Switching Characteristics
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1 VDD and Undervoltage Lockout
      2. 9.3.2 Operating Supply Current
      3. 9.3.3 Input Stage
      4. 9.3.4 Enable Function
      5. 9.3.5 Output Stage
      6. 9.3.6 Low Propagation Delays
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Input-to-Output Logic
        2. 10.2.2.2 Input Threshold Type
        3. 10.2.2.3 VDD Bias Supply Voltage
        4. 10.2.2.4 Peak Source and Sink Currents
        5. 10.2.2.5 Enable and Disable Function
        6. 10.2.2.6 Propagation Delay
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
    4. 12.4 Power Dissipation
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

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発注情報

8 Specifications

8.1 Absolute Maximum Ratings(1)(2)(3)

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Supply voltage VDD –0.3 20 V
OUT voltage DC –0.3 VDD + 0.3
Repetitive pulse less than 200 ns(5) –2 VDD + 0.3
Output continuous current IOUT_DC (source/sink) 0.3 A
Output pulsed current (0.5 µs) IOUT_pulsed(source/sink) 4
IN+, IN-(4) –0.3 20 V
Operating virtual junction temperature, TJ –40 150 °C
Lead temperature Soldering, 10 sec. 300
Reflow 260
Storage temperature, Tstg –65 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND unless otherwise noted. Currents are positive into, negative out of the specified terminal. See Packaging Section of the datasheet for thermal limitations and considerations of packages.
(3) These devices are sensitive to electrostatic discharge; follow proper device-handling procedures.
(4) Maximum voltage on input pins is not restricted by the voltage on the VDD pin.
(5) Values are verified by characterization on bench.

8.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

8.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply voltage range, VDD 4.5 12 18 V
Operating junction temperature range –40 140 °C
Input voltage, IN+ and IN- 0 18 V

8.4 Thermal Information

THERMAL METRIC(1) UCC27516 UCC27517 UNIT
WSON SOT-23
6 PINS 5 PINS
RθJA Junction-to-ambient thermal resistance 85.6 217.6 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 100.1 85.8
RθJB Junction-to-board thermal resistance 58.6 44.0
ψJT Junction-to-top characterization parameter 7.5 4.0
ψJB Junction-to-board characterization parameter 58.7 43.2
RθJC(bot) Junction-to-case (bottom) thermal resistance 23.7 n/a
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

8.5 Electrical Characteristics

VDD = 12 V, TA = TJ = –40°C to 140°C, 1-µF capacitor from VDD to GND. Currents are positive into, negative out of the specified pin.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BIAS CURRENTS
IDD(off) Startup current VDD = 3.4 V IN+ = VDD, IN- = GND 40 100 160 µA
IN+ = IN- = GND or IN+ = IN- = VDD 25 75 145
IN+ = GND, IN- = VDD 20 60 115
UNDERVOLTAGE LOCKOUT (UVLO)
VON Supply start threshold TA = 25°C 3.91 4.20 4.5 V
TA = –40°C to 140°C 3.70 4.20 4.65
VOFF Minimum operating voltage after supply start 3.45 3.9 4.35
VDD_H Supply voltage hysteresis 0.2 0.3 0.5
INPUTS (IN+, IN-)
VIN_H Input signal high threshold Output high for IN+ pin,
Output low for IN- pin		 2.2 2.4 V
VIN_L Input signal low threshold Output low for IN+ pin,
Output high for IN- pin		 1.0 1.2
VIN_HYS Input signal hysteresis 1.0
SOURCE/SINK CURRENT
ISRC/SNK Source/sink peak current(1) CLOAD = 0.22 µF, FSW = 1 kHz ±4 A
OUTPUTS (OUT)
VDD-VOH High output voltage VDD = 12 V
IOUT = –10 mA		 50 90 mV
VDD = 4.5 V
IOUT = –10 mA		 60 130
VOL Low output voltage VDD = 12
IOUT = 10 mA		 5 10
VDD = 4.5 V
IOUT = 10 mA		 6 12
ROH Output pullup resistance(2) VDD = 12 V
IOUT = –10 mA		 5.0 7.5 Ω
VDD = 4.5 V
IOUT = –10 mA		 5.0 11.0
ROL Output pulldown resistance VDD = 12 V
IOUT = 10 mA		 0.5 1.0
VDD = 4.5 V
IOUT = 10 mA		 0.6 1.2
(1) Ensured by Design.
(2) ROH represents on-resistance of P-Channel MOSFET in pullup structure of the UCC27516 and UCC27517's output stage.

8.6 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tR Rise time(1) VDD = 12 V
CLOAD = 1.8 nF		 8 12 ns
VDD = 4.5 V
CLOAD = 1.8 nF		 16 22
tF Fall time(1) VDD = 12 V
CLOAD = 1.8 nF		 7 11
VDD=4.5V
CLOAD = 1.8 nF		 7 11
tD1 IN+ to output propagation delay(1) VDD = 12 V
5-V input pulse CLOAD = 1.8 nF		 4 13 23
VDD = 4.5 V
5-V input pulse CLOAD = 1.8 nF		 4 15 26
tD2 IN- to output propagation delay(1) VDD = 12 V
CLOAD = 1.8 nF		 4 13 23
VDD = 4.5 V
CLOAD = 1.8 nF		 4 19 30
(1) See timing diagrams in Figure 1, Figure 2, Figure 3, and Figure 4.
time1_lusaw9.gif
(PWM Input to IN+ Pin (IN– Pin Tied to GND))
Figure 1. Noninverting Configuration
time2_lusaw9.gif
(PWM Input to IN- Pin (IN+ Pin Tied to VDD))
Figure 2. Inverting Configuration
time3_lusaw9.gif
(Enable and Disable Signal Applied to IN+ Pin, PWM Input to IN- Pin)
Figure 3. Enable and Disable Function Using IN+ Pin
time4_lusaw9.gif
(Enable and Disable Signal Applied to IN- Pin, PWM Input to IN+ Pin)
Figure 4. Enable and Disable Function Using IN- Pin

8.7 Typical Characteristics

G001_Startup Current_lusaw9.pngFigure 5. Startup Current vs Temperature
G002_Operating Supply Current_lusaw9.pngFigure 7. Supply Current vs Temperature (Output In DC On/Off Condition)
G014_Input_Threshold_lusaw9.pngFigure 9. Input Threshold vs Temperature
fig11_lusay4.pngFigure 11. Output Pulldown Resistance vs Temperature
G016_Fall Time_temp_lusaw9.pngFigure 13. Fall Time vs Temperature
G010_IDD_frequency_lusaw9.pngFigure 15. Operating Supply Current vs Frequency
G008_Rise Time_lusaw9.pngFigure 17. Rise Time vs Supply Voltage
G013_Idd_500kHz_lusaw9.pngFigure 6. Operating Supply Current vs Temperature (Output Switching)
G003_UVLO_lusaw9.pngFigure 8. UVLO Threshold Voltage vs Temperature
G004_Pull-Up Resistance_lusaw9.pngFigure 10. Output Pullup Resistance vs Temperature
G015_Rise Time_temp_lusaw9.pngFigure 12. Rise Time vs Temperature
G006_Propagation Delay_lusaw9.pngFigure 14. Input To Output Propagation Delay vs Temperature
G007_Propagation Delay_VDD_lusaw9.pngFigure 16. Propagation Delays vs Supply Voltage
G009_Fall Time_lusaw9.pngFigure 18. Fall Time vs Supply Voltage