UCC27528-Q1 Dual 5-A High-Speed Low-Side Gate Driver Based on CMOS Input Threshold Logic

1 Features

Qualified for Automotive Applications
AEC-Q100 Device Temperature Grade 1
Industry-Standard Pin Out
Two Independent Gate-Drive Channels
5-A Peak Source and Sink Drive Current
CMOS Input Logic Threshold
(Function of Supply Voltage on VDD Pins)
Hysteretic Logic Thresholds for High Noise Immunity
Independent Enable Function for Each Output
Inputs and Enable Pin Voltage Levels Not Restricted by VDD Pin Bias Supply Voltage
4.5-V to 18-V Single Supply Range
Outputs Held Low During VDD UVLO (Ensures Glitch-Free Operation at Power Up and Power Down)
Fast Propagation Delays (17-ns Typical)
Fast Rise and Fall Times (7-ns and 6-ns Typical)
1-ns Typical Delay Matching Between 2 Channels
Outputs Held in Low When Inputs Floating
SOIC-8 Package
Operating Temperature Range of –40°C to 140°C
–5-V Negative Voltage Handling Capability on Input Pins

2 Applications

Automotive
Switch-Mode Power Supplies
DC-to-DC Converters
Motor Control, Solar Power
Gate Drive for Emerging Wideband Gap Power Devices Such as GaN

3 Description

The UCC27528-Q1 device is a dual-channel, high-speed, low-side gate driver capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27528-Q1 device can deliver high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay of 17 ns (typical). In addition, the drivers feature matched internal propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. The input pin thresholds are based on CMOS logic, which is a function of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity. The enable pins are based on TTL and CMOS compatible logic, independent of the VDD supply voltage.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
UCC27528-Q1	SOIC (8)	4.90 mm × 3.91 mm

For all available packages, see the orderable addendum at the end of the datasheet.

Dual Non-Inverting Inputs

4 Revision History

Changes from * Revision (December 2015) to A Revision

Changed device status from Product Preview to Production DataGo

5 Description (continued)

The UCC27528-Q1 device is a dual noninverting driver. Internal pullup and pulldown resistors on the input pins of the UCC27528-Q1 device ensure that outputs are held low when input pins are in floating condition. The UCC27528-Q1 device features enable pins (ENA and ENB) for better control of the operation of the driver applications. The pins are internally pulled up to the VDD supply for active-high logic and can be left open for standard operation.

6 Pin Configuration and Functions

D Package

8-Pin SOIC

Top View

Pin Functions

PIN		I/O	DESCRIPTION
NO.	NAME	I/O	DESCRIPTION
1	ENA	I	Enable input for Channel A: ENA biased low Disables Channel A output regardless of INA state, ENA biased high or floating Enables Channel A output, ENA allowed to float.
2	INA	I	Input to Channel A: Non-Inverting Input in UCC27528-Q1, OUTA held low if INA is unbiased or floating.
3	GND	—	Ground: All signals referenced to this pin.
4	INB	I	Input to Channel B: Non-Inverting Input in UCC27528-Q1, OUTB held low if INB is unbiased or floating.
5	OUTB	O	Output of Channel B
6	VDD	I	Bias supply input
7	OUTA	O	Output of Channel A
8	ENB	I	Enable input for Channel B: ENB biased low Disables Channel B output regardless of INB state, ENB biased high or floating Enables Channel B output, ENB allowed to float.