JAJSNN4B March   2022  – November 2022 UCC27624-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Supply Current
      2. 7.3.2 Input Stage
      3. 7.3.3 Enable Function
      4. 7.3.4 Output Stage
      5. 7.3.5 Low Propagation Delays and Tightly Matched Outputs
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 VDD and Undervoltage Lockout
        2. 8.2.2.2 Drive Current and Power Dissipation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.8 Typical Characteristics

Unless otherwise specified, VDD=12 V, INx = 3.3 V, ENx = 3.3 V, TJ = 25°C, no load

GUID-20210409-CA0I-TTCC-PTNZ-66LNSMNN5MKH-low.png
Figure 6-3 Start-Up and Quiescent Current
Figure 6-5 Static Supply Current (Outputs in DC On or Off Condition)
Figure 6-7 VDD UVLO Threshold
GUID-20210409-CA0I-GVFG-SXZZ-3MSWKKQWLSN1-low.png
Figure 6-9 Input Pulldown Resistance
GUID-20210409-CA0I-XD6F-824Q-7HRFJTFCMHZR-low.png
Figure 6-11 Enable Pullup Resistance
GUID-20210409-CA0I-XV0N-KMP9-BXRZBFTDGLWG-low.png
Figure 6-13 Output Pulldown Resistance
GUID-20211206-SS0I-76JG-6Q4X-DTVWNFM8C0CD-low.png
CLOAD = 1.8 nF
Figure 6-15 Output Fall Time vs VDD
CLOAD = 1.8 nF
Figure 6-17 Input to Output Rising (Turn-On) Propagation Delay vs VDD
GUID-20210702-CA0I-FXBS-KSKS-BFS8BTKV18NX-low.png
CLOAD = 1.8 nF
Figure 6-19 Input Propagation Delay vs Temperature
GUID-20211203-SS0I-XKCG-MZZS-BRXWS0K32LQJ-low.png
CLOAD = 1.8 nF
Figure 6-21 Enable to Output Falling Propagation Delay
Figure 6-23 Turn-Off and Falling Delay Matching
Figure 6-25 Peak Sink Current vs VDD
Figure 6-4 Operating Supply Current (Both Outputs Switching)
GUID-20211206-SS0I-W00Z-70KJ-CTC8FJK6JWDB-low.png
Figure 6-6 Disable Current (EN = 0 V)
Figure 6-8 Input Thresholds
Figure 6-10 Enable Threshold
GUID-20210409-CA0I-VVSJ-Q13N-Z2W7M1WSL7PG-low.png
Figure 6-12 Output Pullup Resistance
GUID-20211206-SS0I-WFDL-TQ1T-RPFG8P5HFSSC-low.png
CLOAD = 1.8 nF
Figure 6-14 Output Rise Time vs VDD
GUID-20211206-SS0I-4PZW-RRMC-SZ5SQRFNJ5LZ-low.png
CLOAD = 1.8 nF
Figure 6-16 Output Rise and Fall Time vs Temperature
CLOAD = 1.8 nF
Figure 6-18 Input to Output Falling (Turn-Off) Propagation Delay vs VDD
CLOAD = 1.8 nF
Figure 6-20 Enable to Output Rising Propagation Delay
Figure 6-22 Turn-on/Rising Delay Matching
Figure 6-24 Peak Source Current vs VDD