SLUSA21A February   2010  – December 2014 UCC2818A-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics
  7. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Feature Description
      1. 7.2.1  Current Amplifier Noninverting Input, CAI
      2. 7.2.2  Current Amplifier Output, CAOUT
      3. 7.2.3  Oscillator Timing Capacitor, CT
      4. 7.2.4  Gate Drive, DRVOUT
      5. 7.2.5  Ground, GND
      6. 7.2.6  Current Proportional to Input Voltage, IAC
      7. 7.2.7  Multiplier Output and Current Amplifier Inverting Input, MOUT
      8. 7.2.8  Overvoltage and Enable, OVP/EN
      9. 7.2.9  PFC Peak Current-Limit, PKLMT
      10. 7.2.10 Oscillator Charging Current, RT
      11. 7.2.11 Soft Start, SS
      12. 7.2.12 Voltage amplifier output, VAOUT
      13. 7.2.13 Positive Supply Voltage, VCC
      14. 7.2.14 Feed-Forward Voltage, VFF
      15. 7.2.15 Voltage Amplifier Inverting Input, VSENSE
      16. 7.2.16 Voltage Reference Output, VREF
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Power Stage
          1. 8.2.1.1.1 LBOOST
          2. 8.2.1.1.2 COUT
        2. 8.2.1.2 Soft Start
        3. 8.2.1.3 Multiplier
        4. 8.2.1.4 Voltage Loop
        5. 8.2.1.5 Current Loop
          1. 8.2.1.5.1 Start Up
          2. 8.2.1.5.2 Capacitor Ripple Reduction
      2. 8.2.2 Application Curves
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings(1)

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Supply voltage 18 V
ICC Supply current 20 mA
Gate drive current, continuous 0.2 A
Gate drive current 1.2 A
Input voltage CAI, MOUT, SS 8 V
PKLMT 5
VSENSE, OVP/EN 10
Input current RT, IAC, PKLMT 10 mA
VCC (no switching) 20
Maximum negative voltage DRVOUT, PKLMT, MOUT –0.5 V
Power dissipation 1 W
θJA Package thermal impedance(2) 73.1 °C/W
TJ Junction temperature –40 150 °C
Tstg Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) he package thermal impedance is calculated in accordance with JESD 51-5.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±1000 V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Thermal Information

THERMAL METRIC(1) D UNIT
16 PINS
θJA Package thermal impedance(2) 73.1 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.4 Electrical Characteristics

TJ = TA = –40°C to 125°C, VCC = 12 V, RT = 22 kΩ, CT = 270 pF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
Supply current, off VCC = (VCC turn-on threshold – 0.3 V) 150 300 μA
Supply current, on VCC = 12 V, No load on DRVOUT 2 4 6 mA
UVLO
VCC turn-on threshold 9.7 10.2 10.9 V
VCC turn-off threshold 9.4 9.7 V
UVLO hysteresis 0.3 0.5 V
VOLTAGE AMPLIFIER
Input voltage 7.369 7.5 7.631 V
VSENSE bias current VSENSE = VREF, VAOUT = 2.5 V 50 200 nA
Open-loop gain VAOUT = 2 V to 5 V 50 90 dB
High-level output voltage IL = –150 μA 5.3 5.5 5.6 V
Low-level output voltage IL = 150 μA 0 50 150 mV
OVERVOLTAGE PROTECTION AND ENABLE
Overvoltage reference VREF + 0.48 VREF + 0.5 VREF + 0.52 V
Hysteresis 300 500 600 mV
Enable threshold 1.7 1.9 2.1 V
Enable hysteresis 0.1 0.2 0.3 V
CURRENT AMPLIFIER
Input offset voltage VCM = 0 V, VCAOUT = 3 V TA = 25°C –3.5 0 3 mV
TA = –40°C to 125°C –5 5
Input bias current VCM = 0 V, VCAOUT = 3 V –50 –100 nA
Input offset current VCM = 0 V, VCAOUT = 3 V 25 100 nA
Open-loop gain VCM = 0 V, VCAOUT = 2 V to 5 V 90 dB
Common-mode rejection ratio VCM = 0 V to 1.5 V, VCAOUT = 3 V 60 80 dB
High-level output voltage IL = –120 mA 5.6 6.5 6.9 V
Low-level output voltage IL = 1 mA 0.1 0.2 0.5 V
Gain bandwidth product(1) 2.5 MHz
VOLTAGE REFERENCE
Input voltage 7.313 to 7.687 7.5 7.631 V
Load regulation IREF = 1 mA to 2 mA 0 10 mV
Line regulation VCC = 10.8 V to 15 V(2) 0 10 mV
Short-circuit current VREF = 0 V –20 –25 –50 mA
OSCILLATOR
Initial accuracy TA = 25°C 85 100 115 kHz
Voltage stability VCC = 10.8 V to 15 V –1 +1 %
Total variation Over line and temperature 80 120 kHz
Ramp peak voltage 4.5 5 5.5 V
Ramp amplitude voltage (peak to peak) 3.5 4 4.5 V
PEAK CURRENT LIMIT
PKLMT reference voltage –15 15 mV
PKLMT propagation delay 150 350 550 ns
MULTIPLIER
IMOUT High line, low power output current IAC = 500 μA, VFF = 4.7 V, VAOUT = 1.25 V 0 –6 –23 μA
High-line, high-power output current IAC = 500 μA, VFF = 4.7 V, VAOUT = 5 V –70 –90 –105
Low-line, low-power output current IAC = 150 μA, VFF = 1.4 V, VAOUT = 1.25 V –10 –19 –50
Low-line, high-power output current IAC = 150 μA, VFF = 1.4 V, VAOUT = 5 V –268 –300 –345
IAC limited output current IAC = 150 μA, VFF = 1.3 V, VAOUT = 5 V –250 –300 –400
Gain constant (K) IAC = 200 μA, VFF = 3 V, VAOUT = 2.5 V 0.5 1 1.6 1/V
IMOUT Zero current IAC = 150 μA, VFF = 1.4 V, VAOUT = 0.25 V 0 –2 μA
IAC = 500 μA, VFF = 4.7 V, VAOUT = 0.25 V 0 –2
IAC = 500 μA, VFF = 4.7 V, VAOUT = 0.5 V 0 –3.5
Power limit (IMOUT  × VFF) IAC = 150 μA, VFF = 1.4 V, VAOUT = 5 V –375 –420 –490 μW
FEED FORWARD
VFF output current IAC = 300 μA –140 –150 –160 μA
SOFT START
Softstart charge current –6 –10 –17 μA
GATE DRIVER
Pullup resistance IO = –100 mA to –200 mA 9 12 Ω
Pulldown resistance IO = 100 mA 4 10 Ω
Output rise time CL = 1 nF, RL = 10 Ω, VDRVOUT = 0.7 V to 9 V 25 50 ns
Output fall time CL = 1 nF, RL = 10 Ω, VDRVOUT = 9 V to 0.7 V 10 50 ns
Maximum duty cycle 93 95 99 %
Minimum controlled duty cycle(1) At 100 kHz 2 %
ZERO POWER
Zero-power comparator threshold Measured on VAOUT 0.2 0.33 0.5 V
(1) Ensured by design, not production tested
(2) Reference variation for VCC < 10.8 V is shown in Figure 8.