SLUSBL5A February   2015  – June 2019 UCC28730

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
      2.      Zero-Power Input Consumption at No-Load
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Detailed Pin Description
        1. 7.3.1.1 VDD (Device Bias Voltage Supply)
        2. 7.3.1.2 GND (Ground)
        3. 7.3.1.3 HV (High Voltage Startup)
        4. 7.3.1.4 DRV (Gate Drive)
        5. 7.3.1.5 CBC (Cable Compensation)
        6. 7.3.1.6 VS (Voltage Sense)
        7. 7.3.1.7 CS (Current Sense)
      2. 7.3.2 Primary-Side Regulation (PSR)
      3. 7.3.3 Primary-Side Constant Voltage Regulation
      4. 7.3.4 Primary-Side Constant Current Regulation
      5. 7.3.5 Wake-Up Detection and Function
      6. 7.3.6 Valley-Switching and Valley-Skipping
      7. 7.3.7 Startup Operation
      8. 7.3.8 Fault Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Stand-By Power Estimate
        2. 8.2.2.2 Input Bulk Capacitance and Minimum Bulk Voltage
        3. 8.2.2.3 Transformer Turns Ratio, Inductance, Primary-Peak Current
        4. 8.2.2.4 Transformer Parameter Verification
        5. 8.2.2.5 Output Capacitance
        6. 8.2.2.6 VDD Capacitance, CVDD
        7. 8.2.2.7 VS Resistor Divider, Line Compensation, and Cable Compensation
        8. 8.2.2.8 VS Wake-Up Detection
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
      2. 11.1.2 Device Nomenclature
        1. 11.1.2.1  Capacitance Terms in Farads
        2. 11.1.2.2  Duty-Cycle Terms
        3. 11.1.2.3  Frequency Terms in Hertz
        4. 11.1.2.4  Current Terms in Amperes
        5. 11.1.2.5  Current and Voltage Scaling Terms
        6. 11.1.2.6  Transformer Terms
        7. 11.1.2.7  Power Terms in Watts
        8. 11.1.2.8  Resistance Terms in Ω
        9. 11.1.2.9  Timing Terms in Seconds
        10. 11.1.2.10 DC Voltage Terms in Volts
        11. 11.1.2.11 AC Voltage Terms in Volts
        12. 11.1.2.12 Efficiency Terms
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

7.4 Device Functional Modes

According to the input voltage, the VDD voltage, and the output load conditions, the device can operate in different modes:

  1. At start-up, when VDD is less than the VVDD(on) turn-on threshold, the HV internal current source is on and charging the VDD capacitor at a (IHV – ISTART) rate.
  2. When VDD exceeds VVDD(on), the HV source is turned Off and the device starts switching to deliver power to the converter output. Depending on the load conditions, the converter operates in CC mode or CV mode.
    1. CC mode means that the converter keeps the output current constant. When the output voltage is below the regulation level, the converter operates in CC mode to restore the output to the regulation voltage.
    2. CV mode means that the converter keeps the output voltage constant. When the load current is less than the current limit level, the converter operates in CV mode to keep the output voltage at the regulation level over the full load and input line ranges.
  3. When operating in CV or CC mode where IPP is greater than 0.55 X IPP(max), the UCC28730 operates continuously in the run state. In this state, the VDD bias current is always at IRUN plus the average gate-drive current.
  4. When operating in CV mode where IPP is less than 0.55 X IPP(max), the UCC28730 operates in the Wait state between switching cycles and in the run state during a switching cycle. In the Wait state, the VDD bias current is reduced to IWAIT after each switching cycle to improve efficiency at light loads.
  5. The device operation can be stopped by the events listed below:
    1. If VDD drops below the VVDD(off) threshold, the device stops switching, its bias current consumption is lowered to ISTART and the internal HV current source is turned on until VDD rises above the VVDD(on) threshold. The device then resumes switching.
    2. If a fault condition is detected, the device stops switching and its bias current consumption is lowered to IFAULT. This current level slowly the discharges VDD to VVDD(off) where the bias current changes from IFAULT to ISTART and the internal HV current source is turned on until VDD rises above the VVDD(on) threshold.
  6. If a fault condition persists, the operation sequence described above in (2) repeats until the fault condition or the input voltage is removed.