SLUSBL5A February 2015 – June 2019 UCC28730
PRODUCTION DATA.
PARAMETER | TEST CONDITION | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
HIGH-VOLTAGE START-UP | ||||||
IHV | Start-up current out of VDD | VHV = 100 V, VVDD = 0 V, start state | 100 | 250 | 500 | µA |
IHVLKG25 | Leakage current into HV | VHV = 400 V, run state, TJ = 25°C | 0.01 | 0.5 | µA | |
BIAS SUPPLY INPUT CURRENT | ||||||
IRUN | Supply current, run | Run state, IDRV = 0 A | 2.1 | 2.65 | mA | |
IWAIT | Supply current, wait | Wait state, IDRV = 0 A, VVDD = 20 V | 52 | 75 | µA | |
ISTART | Supply current, start | Start state, IDRV = 0 A, VVDD = 18 V, IHV = 0 A | 18 | 30 | µA | |
IFAULT | Supply current, fault | Fault state, IDRV = 0 A | 54 | 75 | µA | |
UNDERVOLTAGE LOCKOUT | ||||||
VVDD(on) | VDD turn-on threshold | VVDD low to high | 17.5 | 21 | 23 | V |
VVDD(off) | VDD turn-off threshold | VVDD high to low | 7.3 | 7.7 | 8.1 | V |
VS INPUT AND Wake-Up MONITOR | ||||||
VVSR | Regulating level(1) | Measured at no-load condition, TJ = 25°C | 4 | 4.04 | 4.08 | V |
VVSNC | Negative clamp level below GND | IVSLS = –300 µA | 190 | 250 | 325 | mV |
IVSB | Input bias current | VVS = 4 V | –0.25 | 0 | 0.25 | µA |
VWU(high) | Wake-up threshold at VS, high(2) | VS pin rising | 2 | V | ||
VWU(low) | Wake-up threshold at VS, low | VS pin rising | 15 | 57 | 105 | mV |
CS INPUT | ||||||
VCST(max) | CS maximum threshold voltage(3) | VVS = 3.7 V | 710 | 740 | 770 | mV |
VCST(min) | CS minimum threshold voltage | VVS = 4.35 V | 230 | 249 | 270 | mV |
KAM | AM control ratio, VCST(max) / VCST(min) | 2.75 | 2.99 | 3.2 | V/V | |
VCCR | Constant-current regulation factor | 310 | 319 | 329 | mV | |
KLC | Line compensation current ratio, IVSLS / current out of CS pin | IVSLS = –300 µA | 24 | 25.3 | 28 | A/A |
DRIVER | ||||||
IDRS | DRV source current | VDRV = 8 V, VVDD = 9 V | 20 | 29 | 35 | mA |
RDRVLS | DRV low-side drive resistance | IDRV = 10 mA | 6 | 12 | Ω | |
VDRCL | DRV clamp voltage | VVDD = 35 V | 13 | 14.5 | 16 | V |
RDRVSS | DRV pull-down in start state | 150 | 190 | 230 | kΩ | |
PROTECTION | ||||||
VOVP | Over-voltage threshold(1) | At VS input, TJ = 25°C | 4.52 | 4.62 | 4.71 | V |
VOCP | Over-current threshold | At CS input | 1.4 | 1.5 | 1.6 | V |
IVSL(run) | VS line-sense run current | Current out of VS pin increasing | 190 | 225 | 275 | µA |
IVSL(stop) | VS line-sense stop current | Current out of VS pin decreasing | 70 | 80 | 100 | µA |
KVSL | VS line-sense ratio, IVSL(run) / IVSL(stop) | 2.45 | 2.8 | 3.05 | A/A | |
TJ(stop) | Thermal shut-down temperature | Internal junction temperature | 165 | °C | ||
CABLE COMPENSATION | ||||||
VCBC(max) | Cable compensation output maximum voltage | Voltage at CBC at full load | 2.9 | 3.13 | 3.5 | V |
VCVS(min) | Minimum compensation at VS | VCBC = open, change in VS regulating level from no load to full load | –50 | –15 | 20 | mV |
VCVS(max) | Maximum compensation at VS | VCBC = 0 V, change in VS regulating level from no load to full load | 275 | 325 | 375 | mV |