SLUS829G
August 2008 – February 2020
UCC2897A
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Typical Application Diagram
4
Revision History
5
Device Options
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Detailed Pin Descriptions
8.3.1.1
RDEL
8.3.1.2
RON
8.3.1.3
ROFF
8.3.1.4
VREF
8.3.1.5
SYNC
8.3.1.6
GND
8.3.1.7
CS
8.3.1.8
RSLOPE
8.3.1.9
FB
8.3.1.10
SS/SD
8.3.1.11
PGND
8.3.1.12
AUX
8.3.1.13
OUT
8.3.1.14
VDD
8.3.1.15
LINEUV
8.3.1.16
VIN
8.3.1.17
LINEOV
8.3.2
JFET Control and UVLO
8.3.3
Line Undervoltage Protection
8.3.4
Line Overvoltage Protection
8.3.5
Pulse Skipping
8.3.6
Synchronization
8.3.7
Gate Drive Connection
8.3.8
Bootstrap Biasing
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Oscillator
9.2.2.2
Soft Start
9.2.2.3
VDD Bypass Requirements
9.2.2.4
Delay Programming
9.2.2.5
Input Voltage Monitoring
9.2.2.6
Current Sense and Slope Compensation
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Community Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RGP|20
MPQF126G
PW|20
MPDS362A
サーマルパッド・メカニカル・データ
RGP|20
QFND079Y
発注情報
slus829g_oa
slus829g_pm
11
Layout